| PART |
Description |
Maker |
| LT1033 LT1033C LT1033CK LT1033M LT1033MK |
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-SO 0 to 70 3A. Negative Adjustable Regulator 3A, Negative Adjustable Regulator From old datasheet system
|
Linear Technology Corporation LINER[Linear Technology]
|
| SN74LS73N |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
|
Motorola
|
| SN54LS112A SN54LS112J 74LS112 SN74LS112N SN74LS112 |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
|
MOTOROLA[Motorola, Inc] MOTOROLA[Motorola Inc]
|
| HD74LS107A HD74LS107AFPEL HD74LS107AP |
Dual J-K Negative-edge-triggered Flip-Flops (with Clear)
|
Renesas Electronics Corporation
|
| 74F112 I74F112D I74F112N N74F112D N74F112N 74F112_ |
From old datasheet system Dual J-K negative edge-triggered flip-flop
|
NXP Semiconductors PHILIPS[Philips Semiconductors]
|
| IDT74LVC112A 74LVC112A_DS_87847 |
3.3V CMOS DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP From old datasheet system
|
IDT
|
| 74F114PC |
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears
|
Fairchild Semiconductor
|
| MAX768 MAX768EEE MAX768C_D MAX768C/D |
Low-Noise, Dual-Output, Regulated Charge Pump for GaAsFET, LCD, and VCO Supplies Dual J-K Negative-Edge-Triggered Flip-Flops With Preset And Clear 16-CFP -55 to 125
|
MAXIM - Dallas Semiconductor MAXIM[Maxim Integrated Products] Maxim Integrated Products, Inc.
|
| 74LS73PC |
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14
|
FAIRCHILD SEMICONDUCTOR CORP
|
| 74ACT11112 |
Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 具有清零和预设功能的双路 J-K 下降沿触发器
|
Linear Technology, Corp.
|
| CD74ACT112E |
ACT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
|
HARRIS SEMICONDUCTOR
|