| PART |
Description |
Maker |
| 74HC74DR2 74HC74DR2G 74HC74D 74HC74 74HC74DTR2G 74 |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
Dual D Flip-Flop with Set and Reset(带设置和复位的双D触发 双D触发器的设置和复位（带设置和复位的双触发器）
|
ONSEMI[ON Semiconductor]
|
| MC74HC76 MC74HC76D MC74HC76N ON1498 |
From old datasheet system
DUAL JK FLIP-FLOP WITH SER AND RESET
Dual JK Flip-Flop With Set and Reset
|
MOTOROLA[Motorola, Inc]
ON Semi
|
| ACTS74HMSR-02 |
Dual D Type Flip Flop with Set and Reset, Advanced Logic, CMOS; Temperature Range: -55°C to 125°C; Package: Die (Military Visual) ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC14
|
Intersil, Corp.
|
| 74ALS109AN 74ALS109A 74ALS109AD |
Dual J-K positive edge-triggered flip-flop with set and reset ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
|
Rochester Electronics, LLC
PHILIPS[Philips Semiconductors]
NXP Semiconductors
|
| 74ALVC74 |
Dual D-type flip-flop with set and
|
Philips
|
| IN74VHC74N IN74VHC74 IN74VHC74D |
DUAL D FLIP-FLOP WITH SET AND RESET
|
INTEGRAL[Integral Corp.]
IK Semicon Co., Ltd
|
| MC74VHCT74A-D |
Dual D-Type Flip-Flop with Set and Reset
|
ON Semiconductor
|
| CD4027BCN CD4027BCM |
Dual J-K Master/Slave Flip-Flop with Set and Reset
|
Fairchild Semiconductor
|
| SN54_74LS76A ON2955 |
DUAL JK FLIP-FLOP WITH SET AND CLEAR
From old datasheet system
|
ON Semi
|
| MC74VHCT74ADR2 MC74VHCT74ADR2G MC74VHCT74ADTR2 MC7 |
Dual D?Type Flip?Flop with Set and Reset
Dual D−Type Flip−Flop with Set and Reset
|
ONSEMI[ON Semiconductor]
|
