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CY7C1440V3 - 1M X 36/2M X 18/512K X 72 Pipelined SRAM

CY7C1440V3_235625.PDF Datasheet


 Full text search : 1M X 36/2M X 18/512K X 72 Pipelined SRAM
 Product Description search : 1M X 36/2M X 18/512K X 72 Pipelined SRAM


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36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL Architecture(带NoBL结构6-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM) 36兆位米x 36 / 2 M中的x 18/512K × 72)流体系结构,通过与总线延迟(带总线延迟结构的的36 - Mbit通过的SRAM100万x 36 / 2 M中的x 18/512K × 72)流的SRAM
Cypress Semiconductor Corp.
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512K X 8 STANDARD SRAM, 17 ns, CDFP32 CERAMIC, DFP-32
512K X 8 STANDARD SRAM, 35 ns, CDFP32 CERAMIC, DFP-32
512K X 8 STANDARD SRAM, 15 ns, CDFP32 CERAMIC, DFP-32
512K X 8 STANDARD SRAM, 12 ns, CDIP32
512K X 8 STANDARD SRAM, 25 ns, CQCC32
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CY7C1440V3 Outputs CY7C1440V3 ocr CY7C1440V3 external rom CY7C1440V3 Filter CY7C1440V3 EEprom
CY7C1440V3 electronics CY7C1440V3 configuration CY7C1440V3 header CY7C1440V3 Polarity CY7C1440V3 Interface
 

 

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