| PART |
Description |
Maker |
| QS5919T QS5919T100Q QS5919T133J QS5919T160J QS5919 |
LOW SKEW TTL PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER PLL BASED CLOCK DRIVER, 7 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PDSO28
|
Integrated Device Technology, Inc.
|
| IDT74FCT388915T 74FCT388915T_DATASHEET IDT74FCT388 |
3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER
From old datasheet system
8 Output PLL Clock Generator w/3-State
|
IDT
|
| MPC2510 |
Low Voltage PLL Clock Driver
|
Motorola Semiconductor
|
| MPC974 |
LOW VOLTAGE PLL CLOCK DRIVER
|
Motorola, Inc
|
| LCK4953 |
Low-Voltage PLL Clock Driver
|
AGERE[Agere Systems]
|
| MPC932 |
LOW VOLTAGE PLL CLOCK DRIVER
|
Motorola, Inc
|
| LCK4950 |
Low-Voltage PLL Clock Driver
|
Agere Systems
|
| MPC950 |
(MPC950 / MPC951) LOW VOLTAGE PLL CLOCK DRIVER
|
Motorola
|
| IDT74FCT388915T05 74FCT388915T100J 74FCT388915T10P |
3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER (WITH 3-STATE)
FCT SERIES, PLL BASED CLOCK DRIVER, 7 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PQCC28
|
INTEGRATED DEVICE TECHNOLOGY INC
|
| PCS3P622Z09B PCS3I622Z0XYG-08-SR PCS3P622Z0XYG-08- |
Low Frequency Timing-Safe垄芒 Peak EMI reduction IC
Low Frequency Timing-Safe Peak EMI reduction IC
Low Frequency Timing-Safe?/a> Peak EMI reduction IC
PLL BASED CLOCK DRIVER, PDSO8 0.150 INCH, GREEN, SOIC-8
PLL BASED CLOCK DRIVER, PDSO16 4.40 MM, GREEN, TSSOP-16
PLL BASED CLOCK DRIVER, PDSO8 4.40 MM, GREEN, TSSOP-8
PLL BASED CLOCK DRIVER, PDSO16 0.150 INCH, GREEN, SOIC-16
|
PulseCore Semiconductor
Integrated Device Technology, Inc.
|
| AND8090 AND8090D MC100H601 MC100H601FN MC10H106FN |
3.3V / 5V ECL Quad 2-Input Differential AND/NAND
5V ECL Low Impedance Driver
LOW VOLTAGE DUAL 1:4, 1:5 DIFFERENTIAL FANOUT BUFFER
8 Input Priority Encoder
3.3V ECL Triple D-Type Flip-Flop with Set and Reset
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V Dual Differential LVPECL to LVTTL Translator
3.3V / 5V ECL 6-Bit Differential Register with Master Reset
3.3V ECL 1:15 Differential ÷1/÷2 Clock Driver
Fibre Channel Coaxial Cable Driver and Loop Resillency Circuit
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter
2.5 V/3.3 V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS
3.3V / 5V Programmable PLL Synthesized Clock Generator (25 to 400 MHz)
2.5 V/3.3 V SiGe 1:2 Differential Clock Driver with RSECL Outputs
2.5 V/3.3 V SiGe 1:10 Differential Clock Driver with RSECL Outputs
Triple 4-3-3-Input NOR Gate
9-Bit ECL-TTL Translator
AC Characteristics of ECL Devices
|
Motorola
ONSEMI[ON Semiconductor]
|
