| PART |
Description |
Maker |
| XC4000 XC4003 XC4005 XC4006 XC4008 XC4010 XC4010D |
Logic Cell Array Families
Logic Cell Array Family
|
XILINX[Xilinx, Inc]
|
| XC4000FM XC4000H XC4003H XC4005H XC4025 XC4000 XC4 |
Logic Cell Array Families
|
XILINX[Xilinx, Inc]
|
| HER306-T3 HER306-TB HER302-T3 HER302-TB HER308 HER |
3.0A HIGH EFFICIENCY RECTIFIER 3.0A的高效整
85000 GATE 3.3 VOLT LOGIC CELL ARRAY - NOT RECOMMENDED for NEW DESIGN
28000 GATE 3.3 VOLT LOGIC CELL ARRAY - NOT RECOMMENDED for NEW DESIGN
20000 GATE LOGIC CELL ARRAY - NOT RECOMMENDED for NEW DESIGN
|
Won-Top Electronics Co., Ltd.
WTE[Won-Top Electronics]
|
| XC2018 |
(XC2018 / XC2064) Logic Cell Array
|
Xilinx
|
| HER301 HER303 HER302 |
28000 GATE 3.3 VOLT LOGIC CELL ARRAY - NOT RECOMMENDED for NEW DESIGN
3.0 AMP HIGH EFFICIENCY RECTIFIERS 3.0放大器高效整流二极管
|
Bytes
|
| 256 600 120 ATL25_432 ATL25 ATL25_976 ATL25_100 AT |
ASIC 专用集成电路
From old datasheet system
The ATL25 series gate array and embedded array families from Atmel are fabricated on a 0.25 micron CMOS process with 5 levels of metal. This family features arrays with up to 6.9 million routable gates and 976 pins. The high density and hi
|
Atmel, Corp.
Atmel Corp.
ATMEL[ATMEL Corporation]
|
| XC2S100-5FG256C XC2S100-5FG256I XC2S100 XC2S15-5VQ |
Spartan-II FPGA Family Data Sheet
30000 SYSTEM GATE 2.5 VOLT LOGIC CELL AR - NOT RECOMMENDED for NEW DESIGN FPGA, 216 CLBS, 30000 GATES, 263 MHz, PQFP144
100000 SYSTEM GATE 2.5 VOLT LOGIC CELL A - NOT RECOMMENDED for NEW DESIGN FPGA, 600 CLBS, 100000 GATES, 263 MHz, PBGA256
150000 SYSTEM GATE 2.5 VOLT LOGIC CELL A - NOT RECOMMENDED for NEW DESIGN FPGA, 864 CLBS, 150000 GATES, 263 MHz, PBGA456
200000 SYSTEM GATE 2.5 VOLT LOGIC CELL A - NOT RECOMMENDED for NEW DESIGN FPGA, 1176 CLBS, 200000 GATES, 263 MHz, PBGA256
200000 SYSTEM GATE 2.5 VOLT LOGIC CELL A - NOT RECOMMENDED for NEW DESIGN FPGA, 1176 CLBS, 200000 GATES, 263 MHz, PBGA456
100000 SYSTEM GATE 2.5 VOLT LOGIC CELL A - NOT RECOMMENDED for NEW DESIGN FPGA, 600 CLBS, 100000 GATES, 263 MHz, PQFP144
30000 SYSTEM GATE 2.5 VOLT LOGIC CELL AR - NOT RECOMMENDED for NEW DESIGN FPGA, 216 CLBS, 30000 GATES, 263 MHz, PQFP100
150 000 SYSTEM GATE 2.5 VOLT FPGA (IQ AU - NOT RECOMMENDED for NEW DESIGN
15000 SYSTEM GATE 2.5 VOLT LOGIC CELL AR - NOT RECOMMENDED for NEW DESIGN
50000 SYSTEM GATE 2.5 VOLT LOGIC CELL AR - NOT RECOMMENDED for NEW DESIGN
Spartan-II FPGA Family
Second generation ASIC replacement technology
|
Xilinx, Inc.
XILINX INC
|
| EPM3128ATC EPM3256ATC EPM3032ATC EPM3064A EPM3128A |
Programmable Logic , 64 Macrocells, 4 Logic Array Blocks, 66 I/o Pins, 10ns
Programmable Logic Device Family
Programmable Logic , 128 Macrocells, 8 Logic Array Blocks, 96 I/o Pins, 10ns
|
ALTERA[Altera Corporation]
|
| PA7536SI-15 PA7536 PA7536J-15 PA7536JI-15 PA7536P- |
PEEL Array-TM Programmable Electrically Erasable Logic Array
|
ANACHIP[Anachip Corp]
|
| UPD94154GD-202-5BB |
Standard Cell Array
|
ETC
|
| PALCE16V8H-5JC/5 PALCE16V8H-10PC/4 PALCE16V8H-15PC |
EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic EE PLD, 25 ns, PQCC20
EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic EE PLD, 25 ns, PDSO20
EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic EE PLD, 25 ns, PDIP20
EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic EE PLD, 15 ns, PQCC20
KPTC 3C 3#20 SKT PLUG EE PLD, 15 ns, PDIP20
EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic EE PLD, 7.5 ns, PDSO20
EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic EE PLD, 7.5 ns, PQCC20
EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic EE PLD, 7.5 ns, PDIP20
KPT 5C 5#16 SKT RECP
KPTC 4C 4#20 PIN PLUG
KPT 4C 4#20 PIN PLUG
EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic
|
Lattice Semiconductor, Corp.
Lattice Semiconductor Corporation
|
|
