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Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
INTEGRATED DEVICE TECHNOLOGY INC
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| Part No. |
M2040 M2040-01I400.0000 M2040-01-400.0000 M2040-01I533.3334 M2040-01-533.3334
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| OCR Text |
...r
P Divider
Mfin Divider
lut lut
FOUT1 nFOUT1
Figure 2: Simplified Block Diagram
M2040 Datasheet Rev 1.0
M2040 Frequency Translation PLL with AutoSwitch
Revised 28Jan2005
Integrated Circuit Systems, Inc.
Networki... |
| Description |
FREQUENCY TRANSLATION PLL WITH AUTOSWITCH
SAW PLL for Fault Tolerant Computers with automatic reference clock reselection, Loss of Lock indicator, and Hitless Switching
PHASE LOCKED LOOP, 285 MHz, CQCC36
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| File Size |
189.51K /
12 Page |
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it Online |
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Xilinx
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| Part No. |
XC2S300E-6PQ208C
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| OCR Text |
... hierarchical memory: * 16 bits/lut distributed RAM * Configurable 4K-bit true dual-port block RAM * Fast interfaces to external RAM - Fully 3.3V PCI compliant to 64 bits at 66 MHz and CardBus compliant - Low-power segmented routing archite... |
| Description |
IC,FPGA,6912-CELL,CMOS,QFP,208PIN,PLASTIC
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| File Size |
41.78K /
4 Page |
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it Online |
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Xilinx
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| Part No. |
XC3S5000 XC3S400 XC3S4000 XC3S2000
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| OCR Text |
...c Cell = 4-input Look-Up Table (lut) plus a `D' flip-flop. "Equivalent Logic Cells" equals "Total CLBs" x 8 Logic Cells/CLB x 1.125 effectiveness. 2. These devices are available in Xilinx Automotive versions as described in DS314: Spartan-3... |
| Description |
(XC3S50 - XC3S5000) Spartan-3 FPGA Family
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| File Size |
1,763.79K /
204 Page |
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it Online |
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ICST[Integrated Circuit Systems]
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| Part No. |
M2021 M2020 M2020-2021
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| OCR Text |
...6)
Mfin Div
M / R Divider lut Mfin Divider lut P Divider lut
P Divider
FOUT0: 1, 4, 8, 32 or TriState FOUT1: 1, 4, 8 or TriState
TriState
FOUT0 nFOUT0 FOUT1 nFOUT1
FIN_SEL1:0 P_SEL2:0
2
3
Figure 2: Simplified Blo... |
| Description |
VCSO BASED CLOCK PLL
SAW PLL for Frequency Translation with Loss of Lock indicator and Hitless Switching options
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| File Size |
311.52K /
10 Page |
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it Online |
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N.A.
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| Part No. |
AL600
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| OCR Text |
...tems Sharpness Control Built-in lut for Gamma Correction and Color Adjustment Dithering Logic for Color Depth Enhancement 2
Output Interface:
! ! Output resolution up to 1280x1024 @60Hz Non-interlaced RGB/YPbPr Analog output supported
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| Description |
DTV Controller
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| File Size |
326.90K /
4 Page |
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it Online |
Download Datasheet |
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Price and Availability
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