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LSI[LSI Computer Systems]
LSI Logic
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| Part No. |
L64734 L64733C L64733
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| OCR Text |
... for FEC data output
Chipset interconnections
Figure 4 shows the interconnections between the L64733 and L64734. Figure 4 Chipset Interconnection Diagram
L64733 PLLINp PLLINn MODp MODn FDOUB FLCLK INSEL AGC1 AGC2 CPG1 CPG2 XTLOUT PSOUT... |
| Description |
(L64733) Tuner and Satellite Receiver Chipset
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| File Size |
252.26K /
48 Page |
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XILINX
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| Part No. |
XCS05-3VQ100C XCS20XL
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| OCR Text |
...termine the logic functions and interconnections implemented in the FPGA. The FPGA can either actively read its configuration data from an external serial PROM (Master Serial mode), or the configuration data can be written into the FPGA fro... |
| Description |
From old datasheet system
Spartan and Spartan-XL Families
Field Programmable Gate Arrays
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| File Size |
654.75K /
82 Page |
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it Online |
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Fairchild Semiconductor Corporation
FAIRCHILD[Fairchild Semiconductor]
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| Part No. |
9403APC 9403A
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| OCR Text |
.../parallel input and output. The interconnections necessary to form a 31-word by 16-bit FIFO are shown in Figure 6. Using the same technique, any FIFO of (15m + 1)-words by (4n)-bits can be constructed, where m is the number of devices in a ... |
| Description |
First-In First-Out (FIFO) Buffer Memory
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| File Size |
155.21K /
16 Page |
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ZARLINK[Zarlink Semiconductor Inc]
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| Part No. |
ZL60304 ZL60304MJDA
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| OCR Text |
...erver Clusters, Super-computing interconnections InfiniBand 4x-SX compliant Fibre Channel connections XAUI based interconnections Proprietary backplanes Interconnects rack-to-rack, shelf-to-shelf, board-to-board, board-to-optical backplane
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| Description |
From old datasheet system
Parallel Fiber Optic Transceiver (4 4) x 3.125 Gbps
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| File Size |
372.36K /
19 Page |
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it Online |
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Atmel Corp
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| Part No. |
ATF2500C
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| OCR Text |
...nal logic diagram describes the interconnections between the input, feedback pins and logic cells. All interconnections are routed through the single global bus. The ATF2500Cs are straightforward and uniform PLDs. The 24 macrocells are numb... |
| Description |
2500 gate, 24 Macrocell, 48 Register, standard, quarter and low power, 40 and 44 pin CPLD
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| File Size |
480.24K /
37 Page |
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Atmel Corp
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| Part No. |
ATV2500B
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| OCR Text |
...nal logic diagram describes the interconnections between the input, feedback pins and logic cells. All interconnections are routed through the single global bus. The ATV2500Bs are straightforward and uniform PLDs. The 24 macrocells are numb... |
| Description |
2500 gate high-speed CPLD, standard & low power, 40 & 44 pins
From old datasheet system
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| File Size |
615.64K /
21 Page |
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it Online |
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pmc
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| Part No. |
1991089
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| OCR Text |
...AL1GATOR-8 TO COMET/COMET-QUADS interconnections ............................................................... 19 THE FPGA BLOCK ..................................................................... 20 AAL1GATOR-8'S SRAM .................... |
| Description |
From old datasheet system
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| File Size |
2,476.78K /
87 Page |
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it Online |
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