| |
|
 |
OKI[OKI electronic componets]
|
| Part No. |
MS82V48540-8 FEDS82V48540-01 MS82V48540 MS82V48540-7
|
| OCR Text |
... After the end of burst, bank A holds the active status. After the end of burst, bank A is precharged automatically. After the end of burst, bank B holds the active status. After the end of burst, bank B is precharged automatically. After t... |
| Description |
393,216-Word 】 32-Bit 】 4-Bank FIFO-SGRAM
|
| File Size |
1,402.50K /
44 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
TOSHIBA[Toshiba Semiconductor]
|
| Part No. |
T6A04A
|
| OCR Text |
...ter is a 64-up/down counter. It holds the row address of a location in the display RAM. Writing data to or reading data from the display RAM causes the X-address to be automatically incremented or decremented. * Y-(page) address counter The... |
| Description |
Column and Row Driver LSI for a Dot Matrix Graphic LCD
|
| File Size |
303.60K /
25 Page |
View
it Online |
Download Datasheet |
| |
|
|
EXAR[Exar Corporation]
|
| Part No. |
XRK7933
|
| OCR Text |
...edback signal. d. Specification holds for a clock switch between two signals no greater than 400ps out of phase. Delta period change per cycle is averaged over the clock switch excursion. (See Applications Information section for more detai... |
| Description |
INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER
|
| File Size |
144.03K /
10 Page |
View
it Online |
Download Datasheet |
| |
|
|
EXAR[Exar Corporation]
|
| Part No. |
XRK7955
|
| OCR Text |
...edback signal. d. Specification holds for a clock switch between two signals no greater than 400ps out of phase. Delta period change per cycle is averaged over the clock switch excursion. (See Applications Information section for more detai... |
| Description |
INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER
|
| File Size |
144.74K /
10 Page |
View
it Online |
Download Datasheet |
| |
|
|
EXAR[Exar Corporation]
|
| Part No. |
XRK7988
|
| OCR Text |
...edback signal. d. Specification holds for a clock switch between two signals no greater than 400ps out of phase. Delta period change per cycle is averaged over the clock switch excursion. (See Applications Information section for more detai... |
| Description |
INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER
|
| File Size |
143.40K /
10 Page |
View
it Online |
Download Datasheet |
| |
|
|
EXAR[Exar Corporation]
|
| Part No. |
XRK79892IQ XRK79892
|
| OCR Text |
...edback signal. d. Specification holds for a clock switch between two signals no greater than 400ps out of phase. Delta period change per cycle is averaged over the clock switch excursion. (See Applications Information section for more detai... |
| Description |
INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER
|
| File Size |
188.14K /
10 Page |
View
it Online |
Download Datasheet |
| |
|
|
EXAR[Exar Corporation]
|
| Part No. |
XRK799J93IQ XRK799J93
|
| OCR Text |
...edback signal. d. Specification holds for a clock switch between two signals no greater than 400ps out of phase. Delta period change per cycle is averaged over the clock switch excursion. (See Applications Information section for more detai... |
| Description |
INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER
|
| File Size |
64.53K /
10 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
