| |
|
 |
NS
|
| Part No. |
DS90C385AM
|
| OCR Text |
...ency modulation & deviations of 2.5% center spread or -5% down spread. n "Input Clock Detection" feature will pull all LVDS pairs to logic low when input clock is missing and when /PD pin is logic high. n 18 to 87.5 MHz shift clock support ... |
| Description |
3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display Link-87.5 MHz
|
| File Size |
628.65K /
14 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
Analog Devices, Inc.
Avago Technologies, Ltd.
AD[Analog Devices]
|
| Part No. |
ADN2820 ADN2820ACHIPS ADN2820S21
|
| OCR Text |
... 200 mW Input current overload: 2.8 mA p-p Linear input range: 0.15 mA p-p Output resistance: 50 /side Output offset adjustment range: 240 m...5) OUTB (6) h OFFSET (14) IN (13)' CB 0.85V CF POWMON (8) 20mA AV = 20dB 50 VCC (1,2,3)
GND (10, ... |
| Description |
10.7 Gbps, 3.3V, Low Noise, TIA with Average Power Moniter 10.7 Gbps的，3.3，低噪声，与平均功率监视器行业协
10.7 Gbps, 3.3V, Low Noise, TIA with Average Power Moniter SPECIALTY TELECOM CIRCUIT, UUC14
10.7 Gbps Low Noise, High Gain Transimpedance Amplifier IC with Performance Monitor
|
| File Size |
697.00K /
12 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
