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Motorola
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| Part No. |
MPC993
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| OCR Text |
...pon detection of a failure (CLK stuck HIGH or LOW for at least 1 period), the INP_BAD for that CLK will be latched (H). If that CLK is the primary clock, the IDCS will switch to the good secondary clock and phase/frequency alignment will oc... |
| Description |
Intelllgent Dynamlc Clock Swltch(IDCS) PLL Clock Drlver
From old datasheet system
|
| File Size |
93.21K /
8 Page |
 View
it Online |
Download Datasheet
|
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|
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Motorola
|
| Part No. |
MPC9993
|
| OCR Text |
...pon detection of a failure (CLK stuck HIGH or LOW for at least 1 period), the INP_BAD for that CLK will be latched (H). If that CLK is the primary clock, the IDCS will switch to the good secondary clock and phase/frequency alignment will oc... |
| Description |
Intelllgent Dynamlc Clock Swltch(IDCS) PLL Clock Drlver
From old datasheet system
|
| File Size |
109.55K /
8 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
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