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Motorola
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| Part No. |
MPC9350
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| OCR Text |
...lected input reference clock is routed directly to the output dividers without using the PLL. The test mode is intended for system diagnostics, test and debug purpose. This test mode is fully static and the minimum clock frequency specifica... |
| Description |
Low Voltage PLL Clock Drlver
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| File Size |
136.79K /
12 Page |
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it Online |
Download Datasheet
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TOSHIBA[Toshiba Semiconductor]
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| Part No. |
TA1276AN
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| OCR Text |
...ut
Outputs the Y signal that routed the fsc TRAP (TRAP can be turned on or off with Bus.) and the Y delay line circuit.
5
Outputs B-Y (U) or I signal. U / Q output It includes LPF that can remove carrier.
DC 2.5V Rainbow color b... |
| Description |
TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT SILICON MONOLITHIC
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| File Size |
1,035.99K /
86 Page |
View
it Online |
Download Datasheet
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Price and Availability
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