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Maixm
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| Part No. |
MAX3753 MAX3752 2230
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| OCR Text |
...consumption. A fully integrated phaselocked loop (PLL) provides a frequency lock indication and does not need an external reference clock. Two pin-compatible versions of the quad PBC are available--the MAX3752 for 2.125Gbps or 1.063Gbps ope... |
| Description |
2.125Gbps/1.063Gbps, 3.3V Quad-Port Bypass with Repeater
From old datasheet system
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| File Size |
304.82K /
16 Page |
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it Online |
Download Datasheet
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AD[Analog Devices]
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| Part No. |
ADF4216BRU ADF4218BRU ADF4218 ADF4216 ADF4217 ADF4217BRU
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| OCR Text |
... the PFD input. A complete PLL (phaselocked Loop) can be implemented if the synthesizers are used with an external loop filter and VCOs (Voltage Controlled Oscillators). Control of all the on-chip registers is via a simple 3-wire interface.... |
| Description |
Dual, Integer-N 0.5 GHz/2.5 GHz PLL
Dual, Integer-N 0.5 GHz/2.0 GHz PLL
Dual, Integer-N 0.5 GHz/1.2 GHz PLL
Dual RF PLL Frequency Synthesizers
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| File Size |
215.02K /
20 Page |
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it Online |
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EXAR[Exar Corporation]
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| Part No. |
XRT91L30IQ XRT91L30
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| OCR Text |
...U), which uses a high frequency phaselocked Loop (PLL) to generate the high-speed transmit serial clock from a slower external clock reference. It also provides Clock and Data Recovery (CDR) function by synchronizing its on-chip Voltage Con... |
| Description |
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
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| File Size |
364.65K /
40 Page |
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it Online |
Download Datasheet |
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Price and Availability
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