| Description |
128 x 64 pixel format, LED or EL Backlight available 128K X 8 STANDARD SRAM, 20 ns, PDSO32
high speed CMOS Logic Triple 3-Input NAND Gates 14-SOIC -55 to 125 128K X 8 STANDARD SRAM, 12 ns, PDSO32
5V 128K X 8 CMOS SRAM (Center power and ground) 128K X 8 STANDARD SRAM, 20 ns, PDSO32
5V 128K X 8 CMOS SRAM (Center power and ground) 128K X 8 STANDARD SRAM, 15 ns, PDSO32
high speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-PDIP -55 to 125
high speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125
SRAM - 5V Fast Asynchronous
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