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AWT6302 C281KGKT LT1U82A SK5100SB A398006 NMF0505D HDL15PLD SD02H
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For causes Found Datasheets File :: 12574    Search Time::1.922ms    
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    K4R271669A K4R441869A-NMCG6 K4R441869A-NMCK7 K4R441869A-NMCK8 K4R271669A-NMCK7 K4R271669A-NMCK8 K4R271669A-NBMCCG6 K4R44

SAMSUNG[Samsung semiconductor]
Samsung Electronic
Part No. K4R271669A K4R441869A-NMCG6 K4R441869A-NMCK7 K4R441869A-NMCK8 K4R271669A-NMCK7 K4R271669A-NMCK8 K4R271669A-NBMCCG6 K4R441869A-N_MCK8 K4R271669A-N_MCK7 K4R271669A-N_MCK8 K4R441869A K4R441869A-N_MCG6 K4R441869A-N_MCK7 K4R271669AM-CG6 K4R271669AN-CK8 K4R271669AM-CK7
OCR Text ...e) command from an ROWA packet causes one of the 512 rows of the selected bank to be loaded to its associated sense amps (two 256 byte sense amps for DQA and two for DQB). PRER Command: A PRER (precharge) command from an ROWR packet ca...
Description 256K x 16 x 32s dependent banks direct RDRAM. Access time: 45 ns, I/O freq. 711 MHz.
256K x 16 x 32s dependent banks direct RDRAM. Access time: 53.3 ns, I/O freq. 600 MHz.
256K x 16/18 bit x 2*16 Dependent Banks Direct RDRAMTM
256K x 16 x 32s dependent banks direct RDRAM. Access time: 45 ns, I/O freq. 800 MHz.

File Size 4,046.09K  /  64 Page

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    IDT[Integrated Device Technology]
Part No. IDT77301 77301_DS_33571 IDT77301L12PF IDT77301L12PFI IDT77301L12PFI8 IDT77301L12PF8
OCR Text ...ave Mode: ENS is an input which causes the fifo port to update a data nibble (Q0-3) on the output bus on the next read clock edge. Data bus output for FIFO-c. Master Mode with BNE HIGH: output is a 9-bit word. Master Mode with BNE LOW: data...
Description ATM 1-to-4 Demultiplexer FIFO
From old datasheet system
UTOPIAFIFO 1 TO 4 (128 x 9 x 4) DEMULTIPLEXER-FIFO

File Size 339.72K  /  29 Page

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    IS82C52Z MR82C52_B 82C52 82C52_06 85015013A 8501501XA CS82C52 CS82C5296 CS82C52Z ID82C52 IP82C52 IS82C52 MD82C52_B CP82C

INTERSIL[Intersil Corporation]
Part No. IS82C52Z MR82C52_B 82C52 82C52_06 85015013A 8501501XA CS82C52 CS82C5296 CS82C52Z ID82C52 IP82C52 IS82C52 MD82C52_B CP82C52Z
OCR Text ... DESCRIPTION READ: The RD input causes the 82C52 to output data to the data bus (D0-D7). The data output depends upon the state of the address inputs (A0-A1). CS0 enables the RD input. WRITE: The WR input causes data from the data bus (D0-D...
Description CMOS SERIAL CONTROLLER INTERFACE

File Size 385.31K  /  20 Page

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    MT8930C-1 MT8930CE MT8930CP

MITEL[Mitel Networks Corporation]
Part No. MT8930C-1 MT8930CE MT8930CP
OCR Text ...ct Input (Cmode=0): in NT mode, causes the PLL and Rx filters and peak detectors to be disabled in favour of fixed timing and fixed thresholds for short passive bus operation (0=fixed, 1=adaptive). In TE mode, this is the Priority input. Hi...
Description CMOS ST-BUS⑩ FAMILY Subscriber Network Interface Circuit
CMOS ST-BUS FAMILY Subscriber Network Interface Circuit

File Size 321.91K  /  42 Page

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    MT8930 MT8930C MT8930CC

Mitel Networks Corporation
Part No. MT8930 MT8930C MT8930CC
OCR Text ...ct Input (Cmode=0): in NT mode, causes the PLL and Rx filters and peak detectors to be disabled in favour of fixed timing and fixed thresholds for short passive bus operation (0=fixed, 1=adaptive). In TE mode, this is the Priority input. Hi...
Description CMOS ST-BUS FAMILY Subscriber Network Interface Circuit Preliminary Information

File Size 681.41K  /  36 Page

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    Intel
Part No. AN80C196KB AJ80C196KB AN83C196KB
OCR Text ...ange. nmi a positive transition causes an interrupt vector through external memory location 203eh. inst output high during an external memory read. indicates the read is an instruction fetch. inst is valid throughout the bus cycle. inst is ...
Description Advanced 16-bit CHMOS microcomputer ROMless

File Size 248.39K  /  17 Page

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    Microchip
Part No. TC653AEVUA TC653ACVUA
OCR Text ...alled, open, or unconnected fan causes the tc652/ tc653 to trigger its start-up timer once. if the fault persists, the fault output goes low, and the device is latched in its shutdown mode. to release the fan from shutdown, toggle the shdn ...
Description Integrated femperature sensor & brushless DC fan controller with FanSense TM detect & over-temperature, temp. range 20C
Integrated femperature sensor & brushless DC fan controller with FanSense TM detect & over-temperature, temp. range 10C

File Size 441.59K  /  14 Page

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    Intersil
Part No. CD82C52 8501501XA
OCR Text ... DESCRIPTION READ: The RD input causes the 82C52 to output data to the data bus (D0-D7). The data output depends upon the state of the address inputs (A0-A1). CS0 enables the RD input. WRITE: The WR input causes data from the data bus (D0-D...
Description CMOS Serial Controller Interface

File Size 259.96K  /  20 Page

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