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IDT[Integrated Device Technology]
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| Part No. |
IDT7280 IDT7280L IDT7280L12 IDT7280L12PA IDT7280L12PAI IDT7280L15 IDT7280L15PA IDT7280L15PAI IDT7280L20PA IDT7280L25PA IDT7281 IDT7281L IDT7281L12 IDT7281L12PA IDT7281L12PAI IDT7281L15 IDT7281L15PA IDT7281L15PAI IDT7281L20PA IDT7281L25PA IDT7282 IDT7282L IDT7282L12 IDT7282L12PA IDT7282L12PAI IDT7282L15 IDT7282L15PA IDT7282L15PAI IDT7282L20PA IDT7282L25PA IDT7283 IDT7283L IDT7283L12 IDT7283L12PA IDT7283L12PAI IDT7283L15 IDT7283L15PA IDT7283L15PAI IDT7284 IDT7284L IDT7284L12 IDT7284L12PA IDT7284L12PAI IDT7284L15 IDT7284L15PA IDT7284L15PAI IDT7285 IDT7285L12 IDT7285L12PA IDT7285L12PAI IDT7285L15 IDT7285L15PA IDT7285L15PAI IDT7285LL
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| OCR Text |
...ing edge of RS. Half-Full Flag (HF) will be reset to HIGH after Reset (RS). WRITE ENABLE (W) A write cycle is initiated on the falling edge ...i.e. FF is monitored on the device where Wis used; EF is monitored on the device where R is used). S... |
| Description |
CMOS DUAL ASYNCHRONOUS FIFO DUAL 256 x 9 DUAL 512 x 9DUAL 1024 x 9 DUAL 2048 x 9DUAL 4096 x 9 DUAL 8192 x 9
CMOS DUAL ASYNCHRONOUS FIFO DUAL 256 x 9 DUAL 512 x 9 DUAL 1024 x 9
CMOS DUAL ASYNCHRONOUS FIFO DUAL 256 x 9, DUAL 512 x 9,DUAL 1,024 x 9, DUAL 2,048 x 9,DUAL 4,096 x 9, DUAL 8,192 x 9
CMOS DUAL ASYNCHRONOUS FIFO DUAL 256 x 9, DUAL 512 x 9, DUAL 1024 x 9
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| File Size |
141.97K /
12 Page |
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