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INTEGRATED DEVICE TECHNOLOGY INC
Integrated Device Technology, Inc.
IDT[Integrated Device Technology]
Integrated Device Technolog...
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| Part No. |
IDT71256 IDT71256L IDT71256L100D IDT71256L100DB IDT71256L100L IDT71256L100LB IDT71256L100P IDT71256L100PB IDT71256L100TD IDT71256L100TDB IDT71256L100Y IDT71256L100YB IDT71256L120D IDT71256L120DB IDT71256L120L IDT71256L120LB IDT71256L120P IDT71256L120PB IDT71256L120TD IDT71256L120TDB IDT71256L120Y IDT71256L120YB IDT71256L150D IDT71256L150DB IDT71256L150L IDT71256L150LB IDT71256L150P IDT71256L150PB IDT71256L150TD IDT71256L150TDB IDT71256L150Y IDT71256L150YB IDT71256L20D IDT71256L20DB IDT71256L20L IDT71256L20LB IDT71256L20P IDT71256L20PB IDT71256L20TD IDT71256L20TDB IDT71256L20Y IDT71256L20YB IDT71256L25D IDT71256L25DB IDT71256L25L IDT71256L25LB IDT71256L25P IDT71256L25PB IDT71256L25TD IDT71256L25TDB IDT71256L25Y IDT71256L25YB IDT71256L30D IDT71256L30DB IDT71256L30L IDT71256L30LB IDT71256L30P IDT71256L30PB IDT71256L30TD IDT71256L30TDB IDT71256L30Y IDT71256L30YB IDT71256L35D IDT71256L35DB IDT71256L35L IDT71256L35LB IDT71256L35P IDT71256L35PB IDT71256L35TD IDT71256L35TDB IDT71256L35Y IDT71256L35YB IDT71256L45D IDT71256L45DB IDT71256L45L IDT71256L45LB IDT71256L45P IDT71256L45PB IDT71256L45TD IDT71256L45TDB IDT71256L45Y IDT71256L45YB IDT71256L55D IDT71256L55DB IDT71256L55L IDT71256L55LB I
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| OCR Text |
...r only. * Low-power operation * Battery Backup operation -- 2V data retention * Produced with advanced high-performance CMOS technology * Input and output directly TTL-compatible * Available in standard 28-pin (300 or 600 mil) ceramic DIP, ... |
| Description |
Precision Adjustable (Programmable) Shunt Reference 8-CDIP -55 to 125 的CMOS静态RAM 256K2K的8位）
Dual Pulse-Width-Modulation Control Circuit 16-SSOP 的CMOS静态RAM 256K2K的8位）
CMOS STATIC RAM 256K (32K x 8-BIT) 32K X 8 STANDARD SRAM, 25 ns, CDIP28
Single UART with 16-Byte FIFOs and Auto Flow Control 44-PLCC 0 to 70 的CMOS静态RAM 256K2K的8位）
CABLE SMA/SMA 36 RG-142 的CMOS静态RAM 256K2K的8位）
CMOS STATIC RAM 256K (32K x 8-BIT) 32K X 8 STANDARD SRAM, 120 ns, CDIP28
Dual-Channel Pulse-Width-Modulation (PWM) Control Circuit 16-SSOP -20 to 85 的CMOS静态RAM 256K2K的8位）
CMOS STATIC RAM 256K (32K x 8-BIT) 的CMOS静态RAM 256K2K的8位）
CMOS STATIC RAM 256K (32K x 8-BIT) 32K X 8 STANDARD SRAM, 30 ns, PDSO28
CMOS STATIC RAM 256K (32K x 8-BIT) 32K X 8 STANDARD SRAM, 30 ns, PDIP28
Replaced by TL16C550C : Single UART with 16-Byte FIFO 40-PDIP 0 to 70
Single UART with 16-Byte FIFOs and Auto Flow Control 48-LQFP 0 to 70
1.8-V to 5-V Dual UART with 16-Byte FIFOs 48-TQFP 0 to 70
Replaced by TL16C550C : Single UART with 16-Byte FIFO 44-PLCC 0 to 70
Replaced by TL16C550C : Single UART with 16-Byte FIFOs 44-PLCC 0 to 70
Replaced by TL16C550C : Single UART with 16-Byte FIFOs 44-PLCC -40 to 85
Quad Pulse-Width-Modulation Control Circuit 48-LQFP -20 to 75
CMOS Static RAM 256k ( 32k X 8-bit )
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| File Size |
78.26K /
9 Page |
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