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  back-flip Datasheet PDF File

For back-flip Found Datasheets File :: 1055    Search Time::1.781ms    
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    HD74HC173 74173

Hitachi,Ltd.
HITACHI[Hitachi Semiconductor]
Part No. HD74HC173 74173
OCR Text ...gh level, the Q outputs are fed back to the inputs, forcing the flip-flops to remain in the same state. Clearing is enabled by taking the clear input to a logic high level. The data outputs change state on the positive going edge of the clo...
Description 4-bit D-type Register (with 3-state Outputs)

File Size 55.66K  /  9 Page

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    MACHLV210-12 MACHLV210-12JC MACHLV210-15JC MACHLV210-20JC

LATTICE[Lattice Semiconductor]
Part No. MACHLV210-12 MACHLV210-12JC MACHLV210-15JC MACHLV210-20JC
OCR Text ...atrix distributes these signals back to the PAL blocks in an efficient manner that also provides for high performance. The design software a...flip-flop designs, fMAX is specified for three types of synchronous designs. The first type of desig...
Description High Density EE CMOS Programmable Logic

File Size 212.96K  /  29 Page

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    PCF8563 PCF8563P PCF8563T PCF8563TS

PHILIPS[Philips Semiconductors]
Part No. PCF8563 PCF8563P PCF8563T PCF8563TS
OCR Text ...ltage range: 1.0 to 5.5 V s Low back-up current; typical 0.25 A at VDD = 3.0 V and Tamb = 25 C s 400 kHz two-wire I2C-bus interface (at VDD ...flip-flops are asynchronously set to logic 0; the RTC clock is stopped (CLKOUT at 32.768 kHz is stil...
Description Real-time clock/calendar

File Size 160.11K  /  30 Page

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    TLE6262G

INFINEON[Infineon Technologies AG]
Part No. TLE6262G
OCR Text ...ppears the transceiver switches back to differential mode after another time delay. The bus failures are monitored via the diagnosis protoco...flip-flop has to be activated via the SPI input bit 7. This feature is useful e.g. to monitor that t...
Description Communication Supply - VReg FTCANTransc
Fault Tolerant CAN - LDO

File Size 804.86K  /  38 Page

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    TLE6263 TLE6263G

Infineon Technologies AG
Part No. TLE6263 TLE6263G
OCR Text ...se the IC shall directly be set back to sleep mode after a wake-up, an internal wakeflip-flop has to be reseted via the SPI. Therefore IBIT1...flip-flop. 6.2 Low Dropout Voltage Regulator The integrated low dropout voltage regulator is able...
Description LS CAN, LDO and HS Switch

File Size 630.65K  /  40 Page

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    74ABT2952 74ABT2952D 74ABT2952DB 74ABT2952N 74ABT2952PW 7ABT2952PWDH 74ABT2952_2

PHILIPS[Philips Semiconductors]
NXP Semiconductors
Part No. 74ABT2952 74ABT2952D 74ABT2952DB 74ABT2952N 74ABT2952PW 7ABT2952PWDH 74ABT2952_2
OCR Text ...gistered transceiver. Two 8-bit back-to-back registers store data flowing in both directions between two bidirectional buses. Data applied t...flip-flops (or latches) after applying the power. 4. This parameter is valid for any VCC between 0V ...
Description From old datasheet system
Octal registered transceiver 3-State

File Size 110.39K  /  12 Page

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    M5LV-256_104-10VC M5LV-256_104-10VI M5LV-256_104-10YC M5LV-256_104-10YI M5LV-256_104-12VC M5LV-256_104-12VI M5LV-256_104

LATTICE[Lattice Semiconductor]
Part No. M5LV-256_104-10VC M5LV-256_104-10VI M5LV-256_104-10YC M5LV-256_104-10YI M5LV-256_104-12VC M5LV-256_104-12VI M5LV-256_104-12YC M5LV-256_104-12YI M5LV-256_104-15VI M5LV-256_104-15YI M5LV-256_104-5VC M5LV-256_104-5YC M5LV-256_104-7VC M5LV-256_104-7VI M5LV-256_104-7YC M5LV-256_104-7YI M5LV-256_120-10YC M5LV-256_120-10YI M5LV-256_120-12YC M5LV-256_120-12YI M5LV-256_120-15YI M5LV-256_120-5YC M5LV-256_120-7YI M5LV-256_160-10YC M5LV-256_160-10YI M5LV-256_160-12YC M5LV-256_160-12YI M5LV-256_160-15YI M5LV-256_160-5YC M5LV-256_160-7YC M5LV-256_160-7YI M5LV-256_68-10VC M5LV-256_68-10VI M5LV-256_68-10YC M5LV-256_68-10YI M5LV-256_68-12VC M5LV-256_68-12VI M5LV-256_68-12YC M5LV-256_68-12YI M5LV-256_68-15VI M5LV-256_68-15YI M5LV-256_68-5VC M5LV-256_68-7VC M5LV-256_68-7VI M5LV-256_68-7YC M5LV-256_68-7YI M5LV-256_74-10VC M5LV-256_74-12VC M5LV-256_74-12VI M5LV-256_74-15VI M5LV-256_74-5VI M5LV-256_74-7VC M5LV-256_74-7VI M5LV-128_104-10VC M5LV-128_104-10VI M5LV-128_104-10YC M5LV-128_104-12YC M5LV-128_104-12YI M5LV-128_104-15VI M5LV-128_104-15YI M5LV-128_104-5YC M5LV-128_104-7VC M5LV-128_104-7VI M5LV-128_104-7YC M5LV-128_104-7YI M5LV-128_120-10YC M5LV-128_120-10YI M5LV-128_120-12YC M5LV-128_120-5YC M5LV-
OCR Text ... PAL block have a path directly back to that PAL block called local feedback. If the I/O is used in another PAL block, the interconnect feed...flip-flops can be configured as T-type, J-K, or S-R operation through the use of the XOR gate associ...
Description 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
20ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
10ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
12ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
15ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)

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    MACH210-12JC MACH210-15JC MACH210-20JC MACH210A-10JC MACH210A-10VC MACH210A-12JC MACH210A-12VC MACH210A-7JC MACH210A-7VC

LATTICE[Lattice Semiconductor]
Advanced Micro Devices
Part No. MACH210-12JC MACH210-15JC MACH210-20JC MACH210A-10JC MACH210A-10VC MACH210A-12JC MACH210A-12VC MACH210A-7JC MACH210A-7VC MACH210AQ-12JC MACH210AQ-15JC MACH210AQ-20JC MACH210A-7
OCR Text ...atrix distributes these signals back to the PAL blocks in an efficient manner that also provides for high performance. The design software automatically configures the switch matrix when fitting a design into the device. The Product-term...
Description High-Density EE CMOS Programmable Logic

File Size 335.19K  /  47 Page

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    MACH210-12 MACH210-12JI MACH210-14JI MACH210-15 MACH210-18JI MACH210-20 MACH210-24JI MACH210A-10 MACH210A-12 MACH210A-12

AMD[Advanced Micro Devices]
Lattice Semiconductor
Part No. MACH210-12 MACH210-12JI MACH210-14JI MACH210-15 MACH210-18JI MACH210-20 MACH210-24JI MACH210A-10 MACH210A-12 MACH210A-12JI MACH210A-14JI MACH210A-18JI MACH210A-24JI MACH210A-7 MACH210AQ-12 MACH210AQ-15 MACH210AQ-20
OCR Text ...atrix distributes these signals back to the PAL blocks in an efficient manner that also provides for high performance. The design software automatically configures the switch matrix when fitting a design into the device. The Product-term...
Description High-Density EE CMOS Programmable Logic

File Size 298.61K  /  51 Page

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