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Cypress
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| Part No. |
ULTRA37000 37000
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| OCR Text |
...tively. Because of the superior routability and simple timing model of the Ultra37000 devices, ISR allows users to change existing logic designs while simultaneously fixing pinout assignments and maintaining system performance. The entire f... |
| Description |
5V 3.3V, ISR High-Performance CPLDs
From old datasheet system
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| File Size |
1,182.09K /
65 Page |
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it Online |
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Zarlink Semiconductor
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| Part No. |
CLA60000
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| OCR Text |
...nctions (RAM and ROM) with high routability. Logic programmability is given by dual level metal, with interconnecting vias, plus a forth level of programmability (contacts). The overall architecture of these gate arrays has been designed to... |
| Description |
Channel Less CMOS Gate Arrays
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| File Size |
1,614.69K /
15 Page |
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it Online |
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Xilinx
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| Part No. |
XC9500XV DS049
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| OCR Text |
...288XV) Superior pin-locking and routability with FastCONNECT IITM switch matrix Extra wide 54-input Function Blocks Up to 90 product-terms per macrocell with individual product-term allocation Local clock inversion with three global and one... |
| Description |
Advance Product Specification
From old datasheet system
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| File Size |
167.22K /
18 Page |
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it Online |
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Xilinx
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| Part No. |
XCV100-4BG256C
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| OCR Text |
...vice. This routing improves I/O routability and facilitates pin locking. The Virtex architecture also includes the following circuits that connect to the GRM. * * * Dedicated block memories of 4096 bits each Clock DLLs for clock-distributio... |
| Description |
IC,FPGA,2700-CELL,CMOS,BGA,256PIN,PLASTIC
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| File Size |
476.40K /
76 Page |
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it Online |
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Price and Availability
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