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Integrated Silicon Solu...
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| Part No. |
IS61QDP2B251236A IS61QDP2B251236A1 IS61QDP2B251236A2
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| OCR Text |
...chronous sram (2.0 cycle read latency) features ? 512kx36 and 1mx18 configuration available. ? on - chip delay - locked l oop (dll) for wide data valid window. ? separate independent read and write ports with conc... |
| Description |
512Kx36 and 1Mx18 configuration available
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| File Size |
616.13K /
33 Page |
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Integrated Silicon Solu...
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| Part No. |
IS45S86400F IS42S86400F
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| OCR Text |
...ck cycle ? programmable cas latency (2, 3 clocks) ? burst read/write and burst read/single write operations capability ? burst termination by burst stop and precharge command ? packages: x8/x16: 54-pin tsop-ii, 54-b... |
| Description |
8K refresh cycles every 64 ms
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| File Size |
1,410.81K /
68 Page |
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Integrated Silicon Solu...
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| Part No. |
IS42S86400D IS45S86400D
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| OCR Text |
...ck cycle ? programmable cas latency (2, 3 clocks) ? burst read/write and burst read/single write operations capability ? burst termination by burst stop and precharge command ? packages: x8/x16: 54-pin tsop-ii, 54-b... |
| Description |
Internal bank for hiding row access/precharge
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| File Size |
1,351.26K /
66 Page |
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Integrated Silicon Solu...
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| Part No. |
IS4216100F
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| OCR Text |
...ock cycle ? programmable cas latency (2, 3 clocks) ? burst read/write and burst read/single write operations capability ? burst termination by burst stop and precharge command ? byte controlled by ldqm and udqm ? packages 4... |
| Description |
Random column address every clock cycle
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| File Size |
1,505.82K /
86 Page |
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White Electronic Design...
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| Part No. |
WED3DG6435V10AD1
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| OCR Text |
...ac output valid from clock cas# latency = 2 or 3, lvttl levels, rated @ 50 pf all outputs switching 6.0 (tco = 5.2) 5.4 (tco = 4.6) ns 1 t oh output hold from clock rated @ 50 pf (1.8 ns @ 0 pf) 3 2.7 ns t ohz output valid to z 3 9 2.7 ... |
| Description |
256MB - 32Mx64 SDRAM UNBUFFERED
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| File Size |
182.21K /
7 Page |
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List of Unclassifed Man...
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| Part No. |
SEN06464H2CH1MT-25R SEN06464H2CH1MT-30R
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| OCR Text |
... options: ? data rate / latency marking ddr2 667 mt/s cl5 - 30 ddr2 800 mt/s cl6 - 25 ? module density 512mb with 4 dies and 1 rank ? standard grade (t a ) 0c to 70c (t c ) 0c to 85c grade e (t... |
| Description |
512MB DDR2 ?SDRAM SO-DIMM
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| File Size |
253.35K /
14 Page |
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List of Unclassifed Man...
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| Part No. |
SEN01G64E1CH2MT-30R
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| OCR Text |
...0c options: frequency / latency marking ddr2 667 mhz cl5 -30 module densities 1024mb with 8 dies and 2 ranks standard grade (t a ) 0c to 70c (t c ) 0c to 85c features: 200-pin 64-bit small outline, ... |
| Description |
1GB DDR2 . SDRAM SO-DIMM
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| File Size |
630.49K /
14 Page |
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it Online |
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Price and Availability
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