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Cypress
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| Part No. |
CY7C1329G
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| OCR Text |
...ve low . qualified with bwe to conduct byte writes to the sram. sampled on the rising edge of clk. gw 88 input- synchronous global write enable input, active low . when asserted low on the rising edge of clk, a global write is conduct ed... |
| Description |
2-Mb (64K x 32) Pipelined Sync SRAM
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| File Size |
333.08K /
16 Page |
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Cypress Semiconductor Corp.
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| Part No. |
CY7C1346 7C1346
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| OCR Text |
...tive LOW. Qualified with BWE to conduct byte writes to the SRAM. Sampled on the rising edge of CLK. Global Write Enable Input, active LOW. When asserted LOW on the rising edge of CLK, a global write is conducted (ALL bytes are written, rega... |
| Description |
64K x 36 Synchronous-Pipelined Cache RAM(64K x 36同步流水线式高速缓冲存储器 RAM)
From old datasheet system
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| File Size |
442.86K /
17 Page |
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Power Integrations, Inc...
Power Integrations Inc.
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| Part No. |
TNY254P TNY255P TNY253G TNY254G TNY253P TNY255G
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| OCR Text |
...optocoupler diode will start to conduct, pulling the ENABLE pin low. The Zener could be replaced by a TL431 device for improved accuracy. The ENABLE pin pull-down current threshold is nominally 50 A, but is set to 40 A the instant the thres... |
| Description |
TinySwitch Family Energy Efficient, Low Power Off-line Switchers
TinySwitch Family Energy Efficient/ Low Power Off-line Switchers
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| File Size |
498.91K /
20 Page |
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it Online |
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SGS Thomson Microelectronics
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| Part No. |
AN1439
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| OCR Text |
...compliant with European Code of conduct on Efficiency of External Power Supplies, phase 2, 01.01.2003
Figure 1. EVAL6565N evaluation board: electrical schematic
F1 2A fuse Vin 88V to 264Vac NTC1 10R R1 100 B1 DF04G C5 100F 400V D1 1N414... |
| Description |
EVAL6565N, 30W AC-DC ADAPTER WITH THE L6565 QUASI-RESONANT PWM CONTROLLER
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| File Size |
163.46K /
10 Page |
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it Online |
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Cypress
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| Part No. |
CY7C1333F-100AC
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| OCR Text |
...e low . qualified with we to conduct writes to the sram. sampled on the rising edge of clk. we 88 input- synchronous write enable input, active low . sampled on the rising edge of clk if cen is active low. this signal must be asserted... |
| Description |
2-Mbit (64K x 32) Flow-through SRAM with NoBL(TM) Architecture
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| File Size |
303.00K /
13 Page |
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it Online |
Download Datasheet |
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Cypress
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| Part No. |
CY7C1334F-133AC
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| OCR Text |
...e low . qualified with we to conduct writes to the sram. sampled on the rising edge of clk. we 88 input- synchronous write enable input, active low . sampled on the rising edge of clk if cen is active low. this signal must be asserted... |
| Description |
2-Mbit (64K x 32) Pipelined SRAM with NoBL(TM) Architecture
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| File Size |
255.08K /
14 Page |
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it Online |
Download Datasheet |
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Price and Availability
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