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Cypress Semiconductor, Corp.
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| Part No. |
CY2305CSXA-1
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| OCR Text |
...ine outputs, grouped as 4 + 4 + 1 (cy2309c) 50 ps typical cycle-to-cycle jitter (15 pf, 66 mhz) test mode to bypass phase locked loop (pll) (cy2309c) only, see select input decoding for cy2309c on page 5 available in space saving 16-pi... |
| Description |
3.3V Zero Delay Clock Buffer; Voltage (V): 3.3 V; Frequency Range: 10 MHz to 133 MHz; Outputs: 5; Operating Range: -40 to 85 C 2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
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| File Size |
424.74K /
17 Page |
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Cypress Semiconductor, Corp.
Cypress Semiconductor Corp.
CYPRESS[Cypress Semiconductor]
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| Part No. |
CY2309ZI-1 CY2309SC-1 CY2309SC-1H CY2309SC-1HT CY2309SC-1T CY2305SC-1H CY2309ZC-1H CY2309SI-1H CY2309SI-1T CY2309SI-1 CY2305SI-1 CY2305SI-1H CY2305SI-1T CY2305SC-1T CY2305SC-1HT CY2305SI-1HT CY2309ZI-1HT CY2305 CY2305SC-1 CY2305ZC-1 CY2305ZC-1T CY2309 CY2309SI-1HT CY2309ZC-1HT CY2309ZI-1H
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| OCR Text |
...ine outputs, grouped as 4 + 4 + 1 (CY2309) * Less than 200 ps cycle-cycle jitter, compatible with Pentium-based systems * Test Mode to bypass phase-locked loop (PLL) (CY2309 only [see "Select Input Decoding" on page 2]) * Available in space... |
| Description |
LOW-COST 3.3V ZERO DELAY BUFFER 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
LOW-COST 3.3V ZERO DELAY BUFFER 2305 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
RF Coaxial Connector Adapter; Convert From:SMA Jack; Convert To:1.0/2.3 Jack; Body Style:Straight Adapter, Jack-Jack RoHS Compliant: Yes 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
RF Coaxial Connector Adapter; Convert From:SMA Plug; Convert To:1.0/2.3 Plug; Body Style:Straight Adapter, Plug-Plug RoHS Compliant: Yes 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
RF/Coaxial Connector; RF Coax Type:UHF; Contact Termination:Solder; Body Style:Straight Bulkhead Receptacle; Body Plating:Nickel RoHS Compliant: Yes 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
LOW-COST 3.3V ZERO DELAY BUFFER 2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
RF Coaxial Connector Adapter; Body Plating:Passivated Steel; Body Style:Straight Adapter, Plug-Plug RoHS Compliant: Yes 2309 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16
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| File Size |
199.28K /
13 Page |
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Integrated Device Technology, Inc.
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| Part No. |
IDT23S08T-1
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| OCR Text |
1 commercial temperature range idt23s08t 2.5v zero delay clock multiplier november 2003 2003 integrated device technology, inc. dsc - 65...pll) clock multiplier. it is designed to address high-speed clock distribution and multiplication ap... |
| Description |
2.5V ZERO DELAY CLOCK MULTIPLIER, SPREAD SPECTRUM COMPATIBLE 2.5V的零延迟时钟倍频，扩频兼
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| File Size |
46.41K /
6 Page |
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Mitel Semiconductor
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| Part No. |
MT8930C-1
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| OCR Text |
... in mitels cmos process. figure 1 - functional block diagram dsti dsto f0od c4b f0b star/ rsto ck/nt cmode ltx vbias lrx v dd v ss st-bus interface timing and control d-channel priority mechanism pll hdlc transceiver s-bus link interface li... |
| Description |
CMOS ST-BUS FAMILY Subscriber Network Interface Circuit
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| File Size |
326.29K /
42 Page |
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it Online |
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