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FUJITSU LTD
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| Part No. |
MB81F161622C-70FN
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| OCR Text |
...as column address strobe 17 ras row address strobe 18 cs chip select 19 a 11 (ba) bank select 20 ap auto precharge enable 20, 21, 22, 23, 24, 27, 28, 29, 30, 31, 32 a 0 to a 10 address input ?row: a 0 to a 10 ? column: a 0 to a 7 34 ck... |
| Description |
1M X 16 SYNCHRONOUS DRAM, 6 ns, PDSO50
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| File Size |
390.83K /
45 Page |
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it Online |
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| Part No. |
MT8VDDT1664AG-202A1
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| OCR Text |
...are used to select the bank and row to be accessed. the address bits registered coincident with the read or write command are used to select the bank and the starting column location for the burst access. these ddr sdram modules provide for... |
| Description |
16M X 64 DDR DRAM MODULE, 0.8 ns, DMA184
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| File Size |
403.49K /
23 Page |
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it Online |
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| Part No. |
KMM366S824CT-GH
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| OCR Text |
...0 ~ cs3 chip select input ras row address strobe cas column address strobe we write enable dqm0 ~ 7 dqm v dd power supply (3.3v) v ss ground *v ref power supply for reference sda serial data i/o scl serial clock sa0 ~ 2 address in eeprom ... |
| Description |
8M X 64 SYNCHRONOUS DRAM MODULE, 6 ns, DMA168
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| File Size |
163.28K /
11 Page |
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it Online |
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Winstar
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| Part No. |
WEO012864BLPP3N00000
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| OCR Text |
...r0 . 5 0 0 . 0 5 common 31 (row 2) common 0 (row 64) segment 4 (column 128) segment 131 (column 1) common 32 (row 63) common 63 (row1) glue a free datasheet http://www.datasheet4u.net/
9 ? 21 6. interface pin ... |
| Description |
OLED Display
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| File Size |
921.52K /
21 Page |
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it Online |
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PROMOS TECHNOLOGIES INC
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| Part No. |
V58C2512404SBI6I
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| OCR Text |
...clock enable cs chip select ras row address strobe cas column address strobe we write enable dqs (udqs, ldqs) data strobe (bidirectional) a 0 ?a 12 address inputs ba 0 , ba 1 bank select dq?s data input/output dm (udm, ldm) data mask v dd p... |
| Description |
128M X 4 DDR DRAM, 0.7 ns, PDSO66
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| File Size |
924.79K /
61 Page |
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it Online |
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PROMOS TECHNOLOGIES INC
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| Part No. |
V58C2256164SCE5B
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| OCR Text |
...clock enable cs chip select ras row address strobe cas column address strobe we write enable dqs (udqs, ldqs) data strobe (bidirectional) a 0 ?a 12 address inputs ba0, ba1 bank select dq?s data input/output dm (udm, ldm) data mask v dd powe... |
| Description |
16M X 16 DDR DRAM, 0.65 ns, PDSO66
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| File Size |
917.36K /
61 Page |
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it Online |
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PROMOS TECHNOLOGIES INC
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| Part No. |
V58C2256164SCE5BI
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| OCR Text |
...clock enable cs chip select ras row address strobe cas column address strobe we write enable dqs (udqs, ldqs) data strobe (bidirectional) a 0 ?a 12 address inputs ba0, ba1 bank select dq?s data input/output dm (udm, ldm) data mask v dd powe... |
| Description |
16M X 16 DDR DRAM, 0.65 ns, PDSO66
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| File Size |
915.14K /
61 Page |
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it Online |
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Mosel Vitelic
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| Part No. |
V54C365164VL
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| OCR Text |
...clock enable cs chip select ras row address strobe cas column address strobe we write enable a 0 ? a 11 address inputs ba0, ba1 bank select i/o 1 ? i/o 16 data input/output ldqm, udqm data mask v cc power (+3.3v) v ss ground v ccq power for... |
| Description |
HIGH PERFORMANCE 225/200/166/143 MHz 3.3 VOLT 4M X 16 SYNCHRONOUS DRAM 4 BANKS X 1Mbit X 16
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| File Size |
706.89K /
56 Page |
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it Online |
Download Datasheet
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NANYA TECHNOLOGY CORP
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| Part No. |
NT5DS128M4BT-6K
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| OCR Text |
...are used to select the bank and row to be accessed. the address bits registered coincident with the read or write command are used to select the bank and the starting column location for the burst access. the ddr sdram provides for progr... |
| Description |
128M X 4 DDR DRAM, 0.7 ns, PDSO66
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| File Size |
2,500.58K /
80 Page |
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it Online |
Download Datasheet
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