| |
|
 |
Alliance Semiconductor ... ALSC[Alliance Semiconductor Corporation]
|
| Part No. |
ASM4SSTVF32852 ASM4SSTVF32852-114BT ASM4ISSTVF32852-114BR ASM4ISSTVF32852-114BT ASM4SSTVF32852-114BR
|
| OCR Text |
DDR 24-Bit to 48-Bit Registered Buffer
ASM4SSTVF32852
Features
Differential clock signals. Supports SSTL_2 class ii specifications ...I/O levels except for the LVCMOS RESETB input. Data flow from D to Q is controlled by the differenti... |
| Description |
DDR 24-Bit to 48-Bit Registered Buffer SSTV SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA114 Specialty Clock Management 2.3 V -2.7 V, DDR 24-bit to 48-bit registered buffer
|
| File Size |
106.12K /
13 Page |
View
it Online |
Download Datasheet
|
| |
|
 |
Cypress Semiconductor, Corp.
|
| Part No. |
CY7C1550KV18-450BZC CY7C1550KV18-400BZC CY7C1548KV18-400BZC
|
| OCR Text |
ddr ii+ sram 2-word burst architecture (2.0 cycle read latency) cypress semiconductor corporation ? 198 champion court ? san jose , ca 95134-1709 ? 408-943-2600 document number: 001-15879 rev. *i revised january 25, 2011 72-mbit ddr ii+ s... |
| Description |
Sync SRAM; Architecture: ddr-iI CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 2M X 36 DDR SRAM, 0.45 ns, PBGA165 72-Mbit DDR ii SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
|
| File Size |
657.16K /
31 Page |
View
it Online |
Download Datasheet
|
|

Price and Availability
|