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Altera
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| Part No. |
EP1S20F484
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| OCR Text |
...ination. Termination Technology renamed differential on-chip termination. Updated the number of channels per PLL in Tables 2-37, 2-38, 2-39, 2-40, and 2-41. Updated Figures 2-65 and 2-66. Updated DDR I information. Updated Table 2-23. Added... |
| Description |
FPGA (Field-Programmable Gate Array)
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| File Size |
1,369.20K /
260 Page |
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Download Datasheet
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Altera
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| Part No. |
EP1S40
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| OCR Text |
...ination. Termination Technology renamed differential on-chip termination. Updated the number of channels per PLL in Tables 2-38 through 242. Updated Figures 2-65 and 2-67. Updated DDR I information. Updated Table 2-22. Added Tables 2-25, 2-... |
| Description |
(EP1S10 - EP1S80) Stratix Device
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| File Size |
1,471.48K /
272 Page |
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it Online |
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PMC-Serria
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| Part No. |
PMC-1980495 1980495
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| OCR Text |
...transferred over the interface. renamed the signals to RSOP/TSOP. Addition of the REOP/TEOP end of packet signals which delineate the end of packets being transferred over the interface. Addition of the RMOD[1:0]/TMOD[1:0] modulo signals wh... |
| Description |
SATURN-COMPATIBLE INTERFACE FOR POS PHY DEVICES From old datasheet system
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| File Size |
186.98K /
36 Page |
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it Online |
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