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IBM Microeletronics
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| Part No. |
IBMN312164CT3 IBMN312804CT3
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| OCR Text |
...self refresh ? suspend mode and power down mode ? standard power operation ? 4096 refresh cycles/64ms ? random column address every ck (1-n...output data to a system clock. the chip is fabricated with ibms advanced 128mbit single tran- sistor... |
| Description |
128Mb(8Mbit x 4 I/O x 4 Bank) Synchronous DRAM(128M8Mx 4 I/O x 4 同步动态RAM) 128Mb(4Mbit x 8 I/O x 4 Bank) Synchronous DRAM(128M4Mx 8 I/O x 4 同步动态RAM)
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| File Size |
666.74K /
66 Page |
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TOSHIBA
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| Part No. |
TC7SX04BFE
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| OCR Text |
... cc /gnd current i cc 50 ma power dissipation p d 150 mw storage temperature t stg ?65 to 150 c note: using continuously under ...output control clock-in clock-out function l x l disable h h enable h l enable x: don?... |
| Description |
L-MOS ClockBuffer series
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| File Size |
156.26K /
6 Page |
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it Online |
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Infineon SIEMENS AG
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| Part No. |
HYB39S64160AT HYB39S64160BT HYB39S64160BT-7
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| OCR Text |
...ate with a single 3.3v +/- 0.3v power supply and are available in tsopii packages. these synchronous dram devices are available with lv-ttl ...output cke clock enable ldqm, udqm data mask cs chip select vdd power (+3.3v) ras row address strobe... |
| Description |
64M SDRAM Component 4M x 16 MBit Synchronous DRAM for High Speed Graphics Applications(64M4× 1M× 16)同步动态RAM(用于高速图形场合)) 4M x 16 MBit Synchronous DRAM for High Speed Graphics Applications(64M4M x 16)同步动态RAM(用于高速图形场合))
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| File Size |
119.50K /
18 Page |
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it Online |
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SIEMENS AG
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| Part No. |
HYB39S256160T
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| OCR Text |
...ates with a single 3.3 v 0.3 v power supply and are available in tsopii packages. ? high performance: ? fully synchronous to positiv...output cke clock enable dqm, ldqm, udqm data mask cs chip select v dd power (+ 3.3 v) ras row addre... |
| Description |
256-Mbit(4banks × 4MBit × 16) Synchronous DRAM(256M(4× 4M× 16)同步动态RAM)
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| File Size |
322.49K /
47 Page |
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it Online |
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SIEMENS AG
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| Part No. |
HYB39S256160CT
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| OCR Text |
...tes with a single 3.3v +/- 0.3v power supply and are available in tsopii packages. ? high performance: ? fully synchronous to positive clock...output cke clock enable dqm, ldqm, udqm data mask cs chip select vdd power (+3.3v) ras row address s... |
| Description |
256-Mbit(4banks × 4MBit × 16) Synchronous DRAM(256M(4× 4M× 16)同步动态RAM)
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| File Size |
333.02K /
41 Page |
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it Online |
Download Datasheet
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SIEMENS AG
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| Part No. |
HYB39S256160AT
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| OCR Text |
...ates with a single 3.3 v 0.3 v power supply and are available in tsopii packages. ? high performance: ? fully synchronous to positiv...output cke clock enable dqm, ldqm, udqm data mask cs chip select v dd power (+ 3.3 v) ras row addre... |
| Description |
256-Mbit(4banks × 4MBit × 16) Synchronous DRAM(256M(4× 4M× 16)同步动态RAM)
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| File Size |
287.42K /
42 Page |
View
it Online |
Download Datasheet
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Price and Availability
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