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  peak-hold Datasheet PDF File

For peak-hold Found Datasheets File :: 15571    Search Time::1.984ms    
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    Intersil Corp
Part No. ISL6520CB ISL6520IB
OCR Text ...ng equation: IOCSET xR OCSET I PEAK = -----------------------------------------------r D S ( ON ) Internal circuitry of the ISL6520 will not recognize a voltage drop across ROCSET larger than 0.5V. Any voltage drop across R OCSET that i...
Description Analog IC - Datasheet Reference
From old datasheet system

File Size 193.38K  /  10 Page

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    UPD3734A UPD3734ACY

NEC[NEC]
Part No. UPD3734A UPD3734ACY
OCR Text ...97 mm) size (shorter side) * Peak response wavelength : 550 nm (green) US letter (8.5" x 11") size (shorter side) ORDERING INFORMATION...hold clock 2 SHB VOD RB NC 21 Reset gate clock Output drain voltage 3 20...
Description 2660 PIXELS CCD LINEAR IMAGE SENSOR

File Size 134.78K  /  20 Page

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    ADD8616A8A VDD8608A8A-75BA VDD8608A8A ADD8616A8A-75BA

A-DATA[A-Data Technology]
ADATA Technology Co., Ltd.
Part No. ADD8616A8A VDD8608A8A-75BA VDD8608A8A ADD8616A8A-75BA
OCR Text ...ns in the DC level of the same. Peak to peak noise on VREF may not exceed 2% of the DC value. Rev 2 April, 2002 4 A-Data AC Test C...hold time (to DQS) DQS Falling Edge to CLK Setup Time DQS Falling Edge Hold Time from CLK tDSH In...
Description    DOUBLE DATA RATE SDRAM
From old datasheet system
DOUBLE DATA RATE SDRAM 双倍数据速率SDRAM内存

File Size 206.40K  /  9 Page

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    Intersil Corp
Part No. ISL6520ACB
OCR Text ...ng equation: IOCSET xR OCSET I PEAK = -----------------------------------------------r D S ( ON ) Internal circuitry of the ISL6520A will not recognize a voltage drop across ROCSET larger than 0.5V. Any voltage drop across R OCSET that ...
Description Analog IC - Datasheet Reference
From old datasheet system

File Size 195.69K  /  10 Page

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    X98014 X98014L128-3.3 X98014L128-3.3-Z

Intersil Corporation
Part No. X98014 X98014L128-3.3 X98014L128-3.3-Z
OCR Text ... sampling clock jitter of 250ps peak to peak. Features * 140MSPS maximum conversion rate * Low PLL clock jitter (250ps p-p @ 140MSPS) * ...hold times are at a 140MHz DATACLK rate. SCL LOW to SDA Data Out Valid Time the bus must be free bef...
Description 140MHz Triple Video Digitizer with Digital PLL

File Size 282.18K  /  29 Page

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    X98021 X98021L128-3.3-Z X98021L128-3.3

INTERSIL[Intersil Corporation]
Part No. X98021 X98021L128-3.3-Z X98021L128-3.3
OCR Text ... sampling clock jitter of 250ps peak to peak. Features * 210MSPS maximum conversion rate * Low PLL clock jitter (250ps p-p @ 210MSPS) * ...hold times are at a 140MHz DATACLK rate. SCL LOW to SDA Data Out Valid Time the bus must be free bef...
Description 210MHz Triple Video Digitizer with Digital PLL

File Size 281.91K  /  29 Page

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    HDMP-3268

Agilent (Hewlett-Packard)
Agilent(Hewlett-Packard)
Part No. HDMP-3268
OCR Text ...m approximately 500 mV to 1.0 V peak-to-peak differential. In addition, the output driver and its associated multiplexer can be turned off t...Hold Time Channel Setup Time Channel Hold Time Control Setup Time Control Hold Time Chip Select to D...
Description HDMP-3268 · 3.2 GBit/sec 68 x 68 Digital Crosspoint Switch
3.2 Gbit/sec 68x68 Crosspoint Switch

File Size 153.61K  /  18 Page

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    Intersil
Part No. HI5741
OCR Text ...0 - ns singlet glitch area, ge (peak) r l = 64 ? (note 4) - 1 - pv?s output slew rate r l = 64 ?, dac operating in latched mode (note 4)...hold time, t hld see figure 1 (note 4) 0.5 0.25 - ns propagation delay time, t pd see figure 1 (note...
Description D/A Converter, 14-Bit, 100MSPS, High Speed

File Size 257.79K  /  13 Page

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    AD
Part No. AD7278
OCR Text ...otal Harmonic Distortion (THD)2 Peak Harmonic or Spurious Noise (SFDR)2 Intermodulation Distortion (IMD) 2 Second Order Terms Third Order Te...Hold Acquisition Time2 Throughput Rate POWER REQUIREMENTS VDD I DD Normal Mode(Static) Normal Mode (...
Description 3MSPS,12-/10-/8-Bit ADCs in 6-Lead TSOT

File Size 255.30K  /  21 Page

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