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MAXIM - Dallas Semiconductor
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| Part No. |
DS3131
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| OCR Text |
...
LA[19:0] LD[15:0] LWR(LR/W) lrd(LDS)
LIM
BERT (SECT. 6)
JTRST JTDI JTMS JTCLK JTDO
JTAG TEST ACCESS (SECT. 12)
DS3131
LINT lrdY LMS LCS LHOLD(LBR) LHLDA(LBG) LBGACK LCLK LBHE LBPXS
PIN NAMES IN ( ) ARE ACTIVE WHEN THE D... |
| Description |
40-Port, Unchannelized Bit-Synchronous HDLC
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| File Size |
1,089.33K /
174 Page |
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it Online |
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MAXIM - Dallas Semiconductor
|
| Part No. |
DS3134
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| OCR Text |
...ge 90) 5. figure 10.3a signal lrd* is moved back one lclk cycle to align with the rising edge of lclk #1. 6. figure 103b signal lwr* is moved back one lclk cycle to align with the rising edge of lclc #1.
ds3134 4 of 203 version 6 (05... |
| Description |
CHATEAU - Channelized T1 and E1 And Universal HDLC Controller
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| File Size |
786.35K /
203 Page |
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it Online |
Download Datasheet
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