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Applied Micro Circuits Corp.
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| Part No. |
S3044
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| OCR Text |
...er with the Synchronous Digital hierarchy (SDH) administered by the ITU-T, forms a single international standard for fiber interconnect between telephone networks of different countries. SONET is capable of accommodating a variety of transm... |
| Description |
SONET/SDH/ATM OC-48 16 Receiver(带片上高频锁相环6 SONET/SDH接收器（集成SONET OC-48接口器件
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| File Size |
443.84K /
20 Page |
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it Online |
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Applied Micro Circuits Corp.
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| Part No. |
S3064
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| OCR Text |
...er with the Synchronous Digital hierarchy (SDH) administered by the ITU-T, forms a single international standard for fiber interconnect between telephone networks of different countries. SONET is capable of accommodating a variety of transm... |
| Description |
SONET/SDH/ATM OC-48 Differential 16 Receiver(SONET/SDH/ATM差分16接收
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| File Size |
160.26K /
21 Page |
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it Online |
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Applied Micro Circuits
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| Part No. |
S3067TB20
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| OCR Text |
... with the synchro- nous digital hierarchy (sdh) administered by the itu-t, forms a single international standard for fiber interconnect between telephone networks of differ- ent countries. sonet is capable of accommodating a variety of tran... |
| Description |
Multirate Sonet / SDH / ATM Transceiver w/FEC
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| File Size |
259.53K /
27 Page |
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it Online |
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Xilinx
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| Part No. |
XCV50E
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| OCR Text |
...ophisticated selectram+? memory hierarchy - 1 mb of internal configurable distributed ram - up to 832 kb of synchronous internal block ram - true dual-port blockram capability - memory bandwidth up to 1.66 tb/s (equivalent bandwidth of ove... |
| Description |
Virtex-e Field Programmable Gate Array
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| File Size |
1,827.67K /
233 Page |
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it Online |
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AMCC
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| Part No. |
S3067
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| OCR Text |
...er with the Synchronous Digital hierarchy (SDH) administered by the ITU-T, forms a single international standard for fiber interconnect between telephone networks of different countries. SONET is capable of accommodating a variety of transm... |
| Description |
Multi-rate (OC-48/24/12/3/GBE) Sonet/sdh/atm Transceiver With Fec
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| File Size |
246.27K /
27 Page |
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it Online |
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Cypress
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| Part No. |
CY3130 3130
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| OCR Text |
..., 1999
CY3130
* * * * * * * hierarchy Navigator Warp Galaxy GUI for input Mixed-mode Design Entry for VHDL and Schematics Waveform Editor (ViewTrace) Timing Simulator (ViewSim or Active-HDL Sim) Finite State Machine Editor (Active-HDL F... |
| Description |
Warp3 VHDL and Verilog Development System for CPLDs
From old datasheet system
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| File Size |
136.94K /
6 Page |
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it Online |
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