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aligns Datasheet PDF File

For aligns Found Datasheets File :: 1369 Search Time::1.109ms
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				Cypress Semiconductor
Part No.	CY7B95106 CY7B951-SXC CY7B951-SXI CY7B951-SI
OCR Text	... LOW, the Receive PLL no longer aligns to RIN, but instead aligns with the REFCLK8 frequency. Also, the Link Fault Indicator (LFI) will transition LOW, and the recovered data outputs (RSER) will remain LOW regardless of the signal level on ...
Description	Local Area Network ATM Transceiver Local Area Network ATM Transceiver
File Size	327.29K / 10 Page	View it Online	Download Datasheet

				Tyco Electronics
Part No.	3EXLA2S
OCR Text	...ure the voltage selection arrow aligns with the arrow located on the front of the unit. Fuse Changing Remove the fuse cartridge using a small blade screwdriver or similar tool; for European fusing pull out the sliding fuse covers located at...
Description	Multi-Function Power Modules with RFI Power Line Filters
File Size	51.63K / 2 Page	View it Online	Download Datasheet

				EXAR[Exar Corporation]
Part No.	XRK4993IR-7 XRK4993 XRK4993CR-2 XRK4993CR-5 XRK4993CR-7 XRK4993IR-2 XRK4993IR-5
OCR Text	...igned to the Feedback). PE=Low, aligns the FB_IN faliing edge to the CLKIN falling edge. PE=High, aligns rising edges. * In the "disabled output mode (see below), the disabled state is forced to the opposite state of PE. This keeps the o...
Description	3.3V PROGRAMMABLE SKEW CLOCK BUFFER
File Size	83.98K / 13 Page	View it Online	Download Datasheet

				NANYA List of Unclassifed Manufacturers ETC[ETC] Electronic Theatre Controls, Inc.
Part No.	NT256D64S8HA0G-8B NT256D64S8HA0G NT256D64S8HA0G-75B NT256D64S8HA0G-7K
OCR Text	... 266 MHz ns MHz Unit * DRAM DLL aligns DQ and DQS transitions with clock transitions. Also aligns QFC transitions with clock during Read cycles * Address and control signals are fully synchronous to positive clock edge * Programmable Operat...
Description	256Mb: 32Mx64 unbuffered DDR SDRAM module based 16Mx8 SDRAM 184pin Two Bank Unbuffered DDR SDRAM MODULE 184pin两个银行无缓冲DDR SDRAM内存模块
File Size	182.36K / 13 Page	View it Online	Download Datasheet

				List of Unclassifed Manufacturers ETC[ETC]
Part No.	NT256D64S88A0G-7K NT256D64S88A0G NT256D64S88A0G-75B NT256D64S88A0G-8B
OCR Text	... 266 MHz ns MHz Unit * DRAM DLL aligns DQ and DQS transitions with clock transitions. Also aligns QFC transitions with clock during Read cycles * Address and control signals are fully synchronous to positive clock edge * Programmable Operat...
Description	184pin One Bank Unbuffered DDR SDRAM MODULE
File Size	174.11K / 13 Page	View it Online	Download Datasheet

				ICST[Integrated Circuit Systems]
Part No.	ICS527R-02T ICS527-02 ICS527R-02 ICS527R-02I ICS527R-02IT
OCR Text	...ck up to 160 MHz. The ICS527-02 aligns rising edges on PECLIN with FBIN at a ratio determined by the reference and feedback dividers. For a PECL input and output clock with zero delay, use the ICS527-04. For a CMOS input and PECL output wit...
Description	Clock Slicer User Configurable PECL Input Zero Delay Buffer
File Size	104.54K / 8 Page	View it Online	Download Datasheet

For aligns Found Datasheets File :: 1369 Search Time::1.109ms
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