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  negative-edge Datasheet PDF File

For negative-edge Found Datasheets File :: 14255    Search Time::2.078ms    
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    HT9252 HT9254

Holtek Semiconductor Inc
Holtek Semiconductor In...
Part No. HT9252 HT9254
OCR Text ...on 1 v out analog output 2 v ss negative power supply 3 v in+ non-inverting input 4 v in- inverting input 5 v dd positive power supply 8dip/...edge vdd=1.8v, rising edge vdd=5.0v, falling edge vdd=5.0v, rising edge fig 7. slew rate vs. tempera...
Description Low Voltage Operational Amplifiers

File Size 822.59K  /  15 Page

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    ISL6611A13

Intersil Corporation
Part No. ISL6611A13
OCR Text ...ase pwm controllers to prevent negative transients on the controlled output vo ltage when operation is suspended. this feature eliminat e...edge, a signal low input pulls pwm pin to vcc at the pwm falling edge and then enters tri-state. 8 ...
Description Phase Doubler with Integrated Drivers and Phase Shedding Function

File Size 213.56K  /  14 Page

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    HI-8050 HI-8050PQI HI-8050PQT HI-8051PQT HI-8150 HI-8150PQI HI-8151PQT HI-8151PQI HI-8051 HI-8051PQI HI-8150PQT HI-8151

Holt Integrated Circuit...
HOLTIC[Holt Integrated Circuits]
Holt Integrated Circuits, Inc.
HOLT INTEGRATED CIRCUITS INC
Part No. HI-8050 HI-8050PQI HI-8050PQT HI-8051PQT HI-8150 HI-8150PQI HI-8151PQT HI-8151PQI HI-8051 HI-8051PQI HI-8150PQT HI-8151 HI-8150SERIES
OCR Text ... +5 and -30 volts. The optional negative converter on the HI-8050 & HI-8150 can be used to generate the negative display drive voltage. All ...edge of the clock and latched in parallel to the segment outputs on the high to low transition of th...
Description XCR3256XL-10TQ144I
128 MACROCELL 3.3 VOLT ZERO POWER ISP CP - NOT RECOMMENDED for NEW DESIGN
128 MACROCELL 3.3 VOLT ISP CPLD - NOT RECOMMENDED for NEW DESIGN
CMOS High Voltage LCD Display Driver (30-38 Segments)
CAP METAL POLYPRO .62UF 630V 5% LIQUID CRYSTAL DISPLAY DRIVER, PQFP52
CMOS HIGH VOLTAGE DISPLAY DRIVER LIQUID CRYSTAL DISPLAY DRIVER, PQFP52

File Size 245.98K  /  8 Page

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    ICL3244 ICL3244CA ICL3244CB

INTERSIL[Intersil Corporation]
Part No. ICL3244 ICL3244CA ICL3244CB
OCR Text ...y (+5.5V). Internally Generated Negative Transmitter Supply (-5.5V). Ground Connection. External Capacitor (Voltage Doubler) is connected to...Edge to Transmitters Enabled Delay (tWU) Receiver or Transmitter Edge to Transmitters Enabled Delay ...
Description 1Microamp, 3V to 5.5V, 250kbps, RS-232 Transceiver with Enhanced Automatic Powerdown

File Size 140.54K  /  13 Page

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    HEC4538BT-T HEF4538BT

NXP Semiconductors
Part No. HEC4538BT-T HEF4538BT
OCR Text ...d by either the positive or the negative edges of the input pulse and will produce an accurate out put pulse with a pulse width range of 10...edge triggering. (2) positive edge re-triggering (pulse lengthening). (3) negative edge triggering. ...
Description Dual precision monostable multivibrator
   Dual precision monostable multivibrator

File Size 130.51K  /  18 Page

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    HMT82GV7MMR4A HMT82GV7MMR4A-G7 HMT82GV7MMR4A-H9 HMT82GV7MMR8A-G7 HMT41GV7MFR8A-G7 HMT41GV7MFR4A-G7 HMT82GV7MMR8A-H9 HMT4

Hynix Semiconductor
Part No. HMT82GV7MMR4A HMT82GV7MMR4A-G7 HMT82GV7MMR4A-H9 HMT82GV7MMR8A-G7 HMT41GV7MFR8A-G7 HMT41GV7MFR4A-G7 HMT82GV7MMR8A-H9 HMT41GV7MFR8A-H9 HMT41GV7MFR4A-H9 HMT451V7MFR8A HMT451V7MFR8A-G7 HMT451V7MFR8A-H9
OCR Text ...ation inputs 2 ck0 clock input, negative line 1 dq[63:0] data input/output 64 ck1 clock input, positive line 1 cb[ 7:0] data check bits in...edge of the clock, cas , ras , and we define the operation to be executed by the sdram. v refdq su...
Description DDR3L SDRAM VLP Registered DIMM Based on 4Gb M-die

File Size 1,157.00K  /  67 Page

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    HMT82GV7AMR8A-H9 HMT82GV7AMR4A-G7 HMT82GV7AMR8A-PB HMT82GV7AMR4A-H9 HMT82GV7AMR4A-PB HMT82GV7AMR8A-G7 HMT41GV7AFR4A HMT4

Hynix Semiconductor
Part No. HMT82GV7AMR8A-H9 HMT82GV7AMR4A-G7 HMT82GV7AMR8A-PB HMT82GV7AMR4A-H9 HMT82GV7AMR4A-PB HMT82GV7AMR8A-G7 HMT41GV7AFR4A HMT41GV7AFR4A-H9 HMT41GV7AFR4A-RD HMT41GV7AFR4A-PB HMT451V7AFR8A-PB HMT451V7AFR8A-RD HMT451V7AFR8A-H9 HMT41GV7AFR8A HMT41GV7AFR8A-PB HMT41GV7AFR8A-H9 HMT41GV7AFR8A-RD
OCR Text ...ation inputs 2 ck0 clock input, negative line 1 dq[63:0] data input/output 64 ck1 clock input, positive line 1 cb[ 7:0] data check bits in...edge of the clock, cas , ras , and we define the operation to be executed by the sdram. v refdq su...
Description DDR3L SDRAM VLP Registered DIMM Based on 4Gb A-die

File Size 1,180.45K  /  69 Page

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    NANYA TECHNOLOGY CORP
Part No. M1U25664TUH4A0F-5A
OCR Text .... ck0 , ck1 , ck2 (sstl) negative edge the negative line of the differential pair of syst em clock inputs which drives the input to the on-dimm pll. cke0, cke1 (sstl) active high activates the sdram ck signal when high and...
Description 32M X 64 DDR DRAM MODULE, 0.6 ns, DMA240

File Size 127.77K  /  14 Page

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