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				NXP Semiconductors
Part No.	PCA9527DP PCA9527
OCR Text	...n the port B translating into a nearly 0 V LOW on port A, providing zero offset. The static level offset design of the port B I/O drivers prevent them from being connected to another device that has rise time accelerator including the PCA95...
Description	3-channel bidirectional bus extender for HDMI, I2C-bus and SMBus
File Size	128.20K / 22 Page	View it Online	Download Datasheet

				Maxim Integrated Products Maxim Integrated Produc...
Part No.	DS31404 DS31404GN
OCR Text	...e device can accept or generate nearly any frequency between 2kHz and 750MHz. The device offers two independent DPLLs to serve two independent clock-generation paths. The input clocks are divided down, fractionally scaled as needed, and con...
Description	4-Input, 8-Output, Dual DPLL Timing IC with Sub-ps Output Jitter Differential
File Size	99.71K / 5 Page	View it Online	Download Datasheet

				Maxim Integrated Products Maxim Integrated Produc...
Part No.	DS31406 DS31406GN
OCR Text	...e device can accept or generate nearly any frequency between 2kHz and 750MHz. The input clocks are divided down, fractionally scaled as needed, and continuously monitored for activity and frequency accuracy. The best input clock is selected...
Description	2-Input, 14-Output, Single DPLL Timing IC with Sub-ps Output Jitter
File Size	129.14K / 5 Page	View it Online	Download Datasheet

				Maxim Integrated Products
Part No.	DS31407
OCR Text	...e device can accept or generate nearly any frequency between 2kHz and 750MHz. The input clocks are divided down, fractionally scaled as needed, and continuously monitored for activity and frequency accuracy. The best input clock is selected...
Description	3-Input, 4-Output, Single DPLL Timing IC with Sub-ps Output Jitter Differential
File Size	128.25K / 4 Page	View it Online	Download Datasheet

				Maxim Integrated Products Maxim Integrated Produc...
Part No.	DS31408 DS31408GN
OCR Text	...e device can accept or generate nearly any frequency between 2kHz and 750MHz. The device offers two independent DPLLs to serve two independent clock-generation paths. The input clocks are divided down, fractionally scaled as needed, and con...
Description	8-Input, 14-Output, Dual DPLL Timing IC with Sub-ps Output Jitter and 1588 Clock
File Size	232.90K / 6 Page	View it Online	Download Datasheet

				Maxim Integrated Products
Part No.	DS31415
OCR Text	...e device can accept or generate nearly any frequency between 2kHz and 750MHz. The input clocks are divided down, fractionally scaled as needed, and continuously monitored for activity and frequency accuracy. The best input clock is selected...
Description	3-Input, 4-Output, Single DPLL Timing IC with Sub-ps Output Jitter and 1588 Clock
File Size	137.17K / 5 Page	View it Online	Download Datasheet

				SHARP[Sharp Electrionic Components]
Part No.	PQ12RF2_BPQ12RF2V PQ05RF2_BPQ05RF2V PQ09RF2_BPQ09RF2V PQ15RF2_PQ15RF2V PQ09RF2_PQ09RF2V PQ09RF21 PQ12RF2_PQ12RF2V PQ05RF2_PQ05RF2V PQ15RF2V PQ05RF2 PQ05RF21 PQ05RF2A PQ05RF2B PQ05RF2V PQ09RF2 PQ09RF2A PQ09RF2B PQ09RF2V PQ12RF2 PQ12RF21 PQ12RF2A PQ12RF2B PQ12RF2V PQ15RF2 PQ15RF21 PQ15RF2A PQ15RF2B PQ12RF2/PQ12RF2V PQ05RF2/PQ05RF2V PQ15RF2/PQ15RF2V PQ09RF2/PQ09RF2V
OCR Text	... q ------- R2'+R2 R1'R1 Vref nearly=1.26V,R1' nearly=390 PQ05RF2V : R2'nearly=1.16k PQ09RF2V : R2'nearly=2.40k PQ12RF2V : R2'nearly=3.32k PQ15RF2V : R2'nearly=4.45k (Note) R1' and R2' are built in a specific IC. s Model Line-ups fo...
Description	Low Power-Loss Voltage Regulators
File Size	89.73K / 8 Page	View it Online	Download Datasheet

				Xicor
Part No.	AN141
OCR Text	...charge cycle when the cells are nearly fully charged or nearly fully discharged. this is because the change in voltage versus capacity dv/dq for li-ion batteries is maximum when the cells are nearly charged and also when the cells are n...
Description	The Benefits of Cell Balancing
File Size	170.94K / 13 Page	View it Online	Download Datasheet

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