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Zarlink Semiconductor Inc.
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| Part No. |
ZL30409/DDB ZL30409/DDA
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| OCR Text |
...nization and timing control for multitrunk t1,e1 and sts-3/oc3 systems ? st-bus clock and frame pulse sources description the zl30409 t1/e1 system synchronizer contains a digital phase-locked loop (dpll), which provides timing and synchron... |
| Description |
T1/E1 System Synchronizer with Stratum 3 Holdover
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| File Size |
290.90K /
32 Page |
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Download Datasheet
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International Rectifier, Corp.
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| Part No. |
PT7A4408L
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| OCR Text |
...g and synchronizing signals for multitrunk T1 and E1 primary rate transmission links, and for STS-3/OC3 links. The STBUS clock and framing signals are phase-locked to input reference signals of either 2.048 MHz, 1.544MHz or 8 kHz. The PT7A4... |
| Description |
Complete BrainPower Control System Accelerator Verilog Object Code Manual T1/E1/OC3系统同步
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| File Size |
180.20K /
27 Page |
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it Online |
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ZARLINK[Zarlink Semiconductor Inc]
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| Part No. |
MT9046AN MT9046
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| OCR Text |
...and synchronization signals for multitrunk T1 and E1 primary rate transmission links. The device has reference switching and frequency holdover capabilities to help maintain connectivity during temporary synchronization interruptions.
LO... |
| Description |
T1/E1 System Synchronizer with Holdover
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| File Size |
300.45K /
34 Page |
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it Online |
Download Datasheet |
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ZARLINK[Zarlink Semiconductor Inc]
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| Part No. |
ZL30409_DDB ZL30409 ZL30409_DDA
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| OCR Text |
...nization and timing control for multitrunk T1,E1 and STS-3/OC3 systems ST-BUS clock and frame pulse sources
* * * * * * * *
Description
The ZL30409 T1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides... |
| Description |
Dual reference frequency selectable, 3.3V Digital PLL with multiple clock outputs for T1/E1 and Stratum 4 and 4E applications, with Stratum 3 Holdover
T1/E1 System Synchronizer with Stratum 3 Holdover
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| File Size |
284.56K /
32 Page |
View
it Online |
Download Datasheet |
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