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  lvcmos Datasheet PDF File

For lvcmos Found Datasheets File :: 9359    Search Time::1.297ms    
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    IDT74SSTV16857 IDT74SSTV16857PA IDT74SSTV16857PAG IDT74SSTV16857PAG8 IDT74SSTV16857PA8

IDT[Integrated Device Technology]
Integrated Device Technology, Inc.
Part No. IDT74SSTV16857 IDT74SSTV16857PA IDT74SSTV16857PAG IDT74SSTV16857PAG8 IDT74SSTV16857PA8
OCR Text ...t RESET control compatible with lvcmos levels Flow-through architecture for optimum PCB design Drive up to equivalent of 14 SDRAM loads Latch-up performance exceeds 100mA ESD >2000V per MIL-STD-883, Method 3015; >200V using machine model (C...
Description 14-BIT REGISTERED BUFFER WITH SSTL I/O

File Size 52.38K  /  6 Page

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    MAX9115 MAX9115EXK-T

MAXIM - Dallas Semiconductor
MAXIM[Maxim Integrated Products]
Part No. MAX9115 MAX9115EXK-T
OCR Text ...t and translates it to an LVTTL/lvcmos output. The fail-safe feature sets the output high when the inputs are undriven and open, terminated, or shorted. The device supports a wide common-mode input range, allowing a ground potential differe...
Description Single LVDS Line Receiver in SC70

File Size 136.50K  /  8 Page

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    CY29948AC CY29948AXI CY29948AXIT CY29948AXC CY29948AXCT CY29948ACT PB-FREE

Cypress Semiconductor
Part No. CY29948AC CY29948AXI CY29948AXIT CY29948AXC CY29948AXCT CY29948ACT PB-FREE
OCR Text ...00-mhz clock support lvpecl or lvcmos/lvttl clock input lvcmos-/lvttl-compatible inputs 12 clock outputs: drive up to 24 clock lines synchronous output enable output three-state control 150 ps typical output-to-output skew pin compat...
Description 2.5 V or 3.3 V, 200-MHz, 1:12 Clock Distribution Buffer lvcmos-/LVTTL-compatible inputs

File Size 306.91K  /  10 Page

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    AK8181E

Asahi Kasei Microsystems
Part No. AK8181E
OCR Text ...chronizing clock output enable (lvcmos/lvttl) pin is connected to vdd by internal r esistor. (typ. 51k ) h igh(open) : clock outputs follow clock input. l ow : q outputs are forced low, qn outputs are forced high. 3 clk_sel in ...
Description 3.3V LVPECL 1:4 Clock Fanout Buffer

File Size 495.94K  /  10 Page

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    Electronic Theatre Controls, Inc.
Part No. QL82SD-PT280 QL82SD-PB516 QL82SD-PQ208 QL82SD-PS484
OCR Text ...edback  i/o support for lvttl, lvcmos, pci, gtl+, sstl2, sstl3, lvds, lvpecl  low power/independent power-down mode for each serdes channel  ieee1149.1 jtag support & boundary scan  operation over pcb or backplane traces, or across ...
Description 10 High Speed Bus LVDS Serial Links bandwidth up to 5 Gbps 10高速总线LVDS串行链路的带宽高Gbps

File Size 3,838.66K  /  60 Page

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    AK8181F

Asahi Kasei Microsystems
Part No. AK8181F
OCR Text ...chronizing clock output enable (lvcmos/lvttl) pin is connected to vdd by internal re sistor. (typ. 51k ? ? high (open): clock outputs follow clock input. low: q outputs are forced low, qn outputs are forced high. 3 clk_sel in ...
Description 3.3V LVDS 1:4 Clock Fanout Buffer

File Size 592.84K  /  12 Page

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    AK8181C

Asahi Kasei Microsystems
Part No. AK8181C
OCR Text ...uts selectable two lvttl/ lvcmos in puts clock output frequency up to 266 mhz o utput skew : 2 0ps max imum part - to - part skew : 2 0 0ps maximum propagation de l ay : 1.4 ns maximum a dditive phase jitte...
Description 3.3V LVPECL 1:2 Clock Fanout Buffer

File Size 404.97K  /  8 Page

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    P3P8163A

ON Semiconductor
Part No. P3P8163A
OCR Text ...mber: p3p8163a/d p3p8163a 3.3v, lvcmos spread spectrum peak emi reduction device product description p3p8163a is a 3.3 v, spread spectrum frequency modulator that generates a 1x, lvcmos low emi spread spectrum clock and two reference clock ...
Description Spread Spectrum Peak EMI Reduction Device, lvcmos, 3.3 V

File Size 121.86K  /  6 Page

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