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International Business Machines, Corp.
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| Part No. |
IBM041813PPLB
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| OCR Text |
... of operation compati- ble with i486 tm and pentium tm processors ? supports pentium tm processor address pipelining ? common i/o and registered outputs ? single +3.3v 5% power supply and ground ? lvttl i/o compatible ? fast oe time: 5... |
| Description |
64K X 18 BURST PIPELINE SRAM(1M (64K X 18)同步可猝发流水线式线式高性能静态RAM) 64K的X管道18的SRAM00万(64K的X 18)同步可猝发流水线式线式高性能静态内存)
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| File Size |
144.16K /
12 Page |
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Cypress
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| Part No. |
CY7C1031 CY7C1032 7C1031 CY7C1031-8JCT CY7C1032-10JCT
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| OCR Text |
...signed for Intel(R) Pentium and i486 CPUbased systems; its counter follows the burst sequence of the Pentium and the i486 processors. The CY7C1032 is architected for processors with linear burst sequences. Burst accesses can be initiated wi... |
| Description |
64K x 18 Synchronous Cache RAM From old datasheet system 64K x 18 SynchronousCache RAM
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| File Size |
229.64K /
12 Page |
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it Online |
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Cypress Semiconductor, Corp.
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| Part No. |
CYM7232 CYM7264 7232SP
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| OCR Text |
...ransfer control signals support i486, Pentium, i860, 68040, 88110, SPARC MBus, MIPS R4000, or other interfaces. The controller module interfaces to the DRAM array through a 16-byte-wide data bus plus check bits, a 12-bit row/column address ... |
| Description |
DRAM Accelerator Module(DRAM加速器模块) DRAM CONTROLLER, XMA From old datasheet system
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| File Size |
26.08K /
1 Page |
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it Online |
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Cypress Semiconductor Corp.
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| Part No. |
CY7C1346 7C1346
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| OCR Text |
...urst order supports Pentium and i486 processors. The linear burst sequence is suited for processors that utilize a linear burst sequence. The burst order is user selectable, and is determined by sampling the MODE input. Accesses can be init... |
| Description |
64K x 36 Synchronous-Pipelined Cache RAM(64K x 36同步流水线式高速缓冲存储器 RAM) From old datasheet system
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| File Size |
442.86K /
17 Page |
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it Online |
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