| |
|
 |
Analog Devices, Inc.
|
| Part No. |
AD9480
|
| OCR Text |
... v r e ference single-ended or differenti a l analog inputs lvds outputs ( a nsi 64 4 le vels ) power-down mode clock du ty cy cle stabilizer applic ati o ns digital oscillos c opes instrumentation and meas ure m ent communicatio... |
| Description |
8-Bit, 250 MSPS 3.3 V A/D Converter
|
| File Size |
904.62K /
28 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
Chrontel
|
| Part No. |
CH7011A
|
| OCR Text |
...lock inputs these inputs form a differenti al clock signal input to the ch7011 for use with the h, v, de and d[11:0] data. if differential clocks are not available, the xclk* input should be conn ected to vref. the output clocks from this ... |
| Description |
Chrontel CH7011 TV Output Device
|
| File Size |
532.67K /
44 Page |
View
it Online |
Download Datasheet |
| |
|
|
Iterra
|
| Part No. |
IT4031F
|
| OCR Text |
... the control is single-ended or differenti al. the device can delay nrz streams with data rates to 12.5 gb/s or a clock signal up to 10.7 ghz . both inputs and outputs are dc-coupled. the it4031f uses scfl i/o levels and is designed so t... |
| Description |
100-ps wideband phase delay
|
| File Size |
551.21K /
5 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
