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ICS
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| Part No. |
ICS843002-31
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| OCR Text |
...n support LVpecl, LVDS, LVHSTL, SSTL, HCSL or single-ended LVCMOS or LVTTL levels * Singled ended inputs can support LVCMOS or LVTTL levels ...3 46 4 45 5 44 6 43 7 42 64-Lead TQFP, EPAD 8 41 10mm x 10mm x 1.0mm 9 40 package body 10 39 Y packa... |
| Description |
700MHz, FemtoClock? VCXO Based Frequency Translator and Jitter Attenuator
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| File Size |
276.08K /
24 Page |
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it Online |
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ICS
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| Part No. |
ICS843002I-41
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| OCR Text |
...t levels: LVpecl, LVDS, LVHSTL, SSTL, HCSL or single-ended LVCMOS or LVTTL levels * Maximum output frequency: 700MHz * FemtoClock VCO freque...3.3V or mixed 3.3V core/2.5V output supply voltage * -40C to 85C ambient operating temperature
GE... |
| Description |
700MHz, FemtoClock? VCXO Based SONET/SDH Jitter Attenuator
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| File Size |
274.06K /
21 Page |
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it Online |
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Integrated Circuit Syst...
ICST[Integrated Circuit Systems]
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| Part No. |
ICS852911I ICS852911AVI ICS852911AVIT
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| OCR Text |
...put levels: LVpecl, LVDS, HSTL, SSTL, HCSL * pecl_CLK, npecl_CLK supports the following input types: LVpecl, CML, SSTL * Maximum output freq...3.3V core, 1.6V to 3.6V output supply range * -40C to 85C ambient operating temperature
GENERAL D... |
| Description |
Low Skew, 1-to-9, Differential-to-HSTL Fanout Buffer. VOHmax=1.4V. Industrial Temperature.
LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-HSTL FANOUT BUFFER
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| File Size |
202.81K /
15 Page |
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it Online |
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ICS
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| Part No. |
ICS1523
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| OCR Text |
...ntial outputs * Up to 250 MHz * SSTL_3 Single-ended clock outputs * Up to 150 MHz * Dynamic Phase Adjust (DPA) for all outputs * I2C controlled phase adjustment * Full clock cycle down to 1/64 of a clock * Double-buffered control registers ... |
| Description |
Video Clock Synthesizer with I2C Programmable Delay
From old datasheet system
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| File Size |
324.49K /
21 Page |
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it Online |
Download Datasheet |
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Integrated Circuit Systems Inc
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| Part No. |
ICS1523
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| OCR Text |
...ntial outputs * Up to 250 MHz * SSTL_3 Single-ended clock outputs * Up to 150 MHz * Dynamic Phase Adjust (DPA) for all outputs * I2C controlled phase adjustment * Full clock cycle down to 1/64 of a clock * Double-buffered control registers ... |
| Description |
IC,TV/VIDEO CIRCUIT,TV/VIDEO SYNC CIRCUIT,CMOS,SOP,24PIN,PLASTIC
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| File Size |
333.59K /
21 Page |
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it Online |
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Price and Availability
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