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Motorola
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| Part No. |
MC100ES8111
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| OCR Text |
...O pins must be connected to the postive power supply (1.5V or 1.8V) for correct DC and AC operation.
Table 2. FUNCTION TABLE
Control CLK_SEL OE Default 0 0 0 CLK0, CLK0 (HSTL) is the active differential clock input Q[0-9], Q[0-9] are ac... |
| Description |
Preliminary Information LOW Voltage 1:10 Dlfferentlal HSTL Clock Fanout Buffer
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| File Size |
129.93K /
8 Page |
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it Online |
Download Datasheet
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Integrated Device Technology, Inc.
IDT
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| Part No. |
IDT74ALVCH374 74ALVCH374_DS_8412 IDT74ALVCH374SO8
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| OCR Text |
...computing systems
This octal postive edge-triggered D-type flip-flop is built using advanced dual metal CMOS technology. The ALVCH374 device is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers... |
| Description |
ALVC/VCX/A SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 1.27 MM PITCH, SOIC-20
From old datasheet system
3.3V CMOS OCTAL POSITIVE EDGE-TRIGGERED D-TYPE FLIP-FLOP
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| File Size |
59.87K /
6 Page |
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it Online |
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Price and Availability
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