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EXAR[Exar Corporation]
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| Part No. |
XRK7955
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| OCR Text |
pll CLOCK DRIVER
be latched (H). If that CLK is the primary clock, the device will switch to the good secondary clock and phase/frequency a...idcs is disabled, pll functions normally). pll reference signal (as indicated by Clk_Selected) will ... |
| Description |
INTELLIGENT DYNAMIC CLOCK SWITCH pll CLOCK DRIVER
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| File Size |
144.74K /
10 Page |
 View
it Online |
Download Datasheet
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EXAR[Exar Corporation]
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| Part No. |
XRK7988
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| OCR Text |
pll CLOCK DRIVER
device will switch to the good secondary clock and phase/frequency alignment will occur with minimal output phase disturba...idcs is disabled, pll functions normally). pll reference signal (as indicated by Clk_Selected) will ... |
| Description |
INTELLIGENT DYNAMIC CLOCK SWITCH pll CLOCK DRIVER
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| File Size |
143.40K /
10 Page |
View
it Online |
Download Datasheet |
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EXAR[Exar Corporation]
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| Part No. |
XRK79892IQ XRK79892
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| OCR Text |
pll CLOCK DRIVER
phase/frequency alignment will occur with minimal output phase disturbance. The typical phase bump caused by a failed cloc...idcs is disabled, pll functions normally). pll reference signal (as indicated by Clk_Selected) will ... |
| Description |
INTELLIGENT DYNAMIC CLOCK SWITCH pll CLOCK DRIVER
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| File Size |
188.14K /
10 Page |
View
it Online |
Download Datasheet |
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EXAR[Exar Corporation]
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| Part No. |
XRK799J93IQ XRK799J93
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| OCR Text |
pll CLOCK DRIVER
REV. 1.0.1
GENERAL DESCRIPTION
The XRK799J93 is a pll clock driver designed specifically for redundant clock tree desi...idcs is disabled, pll functions normally). pll reference signal (as indicated by Clk_Selected) will ... |
| Description |
INTELLIGENT DYNAMIC CLOCK SWITCH pll CLOCK DRIVER
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| File Size |
64.53K /
10 Page |
View
it Online |
Download Datasheet |
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Motorola
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| Part No. |
MPC9894
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| OCR Text |
...differential input and output, pll-based intelligent dynamic clock switch (idcs) and clock generator specifically designed for redundant clock distribution systems. the device receives up to four lvpecl clock signals and gene rates eight ... |
| Description |
Quad Input Redundant idcs Clock Generator
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| File Size |
335.11K /
32 Page |
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it Online |
Download Datasheet |
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Integrated Device Technology, Inc.
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| Part No. |
MPC9993FA
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| OCR Text |
pll clock driver mpc9993 rev 3, 06/2005 freescale semiconductor technical data ? freescale semiconductor, in c., 2005. all rights reserved. intelligent dynamic clock switch (idcs) pll clock driver the mpc9993 is a pll clock driver designe... |
| Description |
IC pll/idcs pll CLK DVR 32-LQFP 9993 SERIES, pll BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
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| File Size |
339.09K /
10 Page |
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it Online |
Download Datasheet |
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