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    ICS4320A01L ICS84320A01N

Integrated Device Technology
Part No. ICS4320A01L ICS84320A01N
OCR Text ... the nP_LOAD input, the data is latched and the M divider remains loaded until the next LOW transition on nP_LOAD or until a serial event occurs. As a result, the M and N bits can be hardwired to set the M divider and N output divider to a ...
Description 780MHZ, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER

File Size 315.48K  /  21 Page

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    AM28F010A AM28F010A-120EC AM28F010A-120ECB AM28F010A-120EE AM28F010A-120EEB AM28F010A-120EI AM28F010A-120EIB AM28F010A-1

AMD[Advanced Micro Devices]
Part No. AM28F010A AM28F010A-120EC AM28F010A-120ECB AM28F010A-120EE AM28F010A-120EEB AM28F010A-120EI AM28F010A-120EIB AM28F010A-120FC AM28F010A-120FCB AM28F010A-120FE AM28F010A-120FEB AM28F010A-120FI AM28F010A-120FIB AM28F010A-120JC AM28F010A-120JCB AM28F010A-120JE AM28F010A-120JEB AM28F010A-120JI AM28F010A-120JIB AM28F010A-120PC AM28F010A-120PCB AM28F010A-120PE AM28F010A-120PEB AM28F010A-120PI AM28F010A-120PIB AM28F010A-150EC AM28F010A-150ECB AM28F010A-150EE AM28F010A-150EEB AM28F010A-150EI AM28F010A-150EIB AM28F010A-150FC AM28F010A-150FCB AM28F010A-150FE AM28F010A-150FEB AM28F010A-150FI AM28F010A-150FIB AM28F010A-150JC AM28F010A-150JCB AM28F010A-150JE AM28F010A-150JEB AM28F010A-150JI AM28F010A-150JIB AM28F010A-150PC AM28F010A-150PCB AM28F010A-150PE AM28F010A-150PEB AM28F010A-150PI AM28F010A-150PIB AM28F010A-200EC AM28F010A-200ECB AM28F010A-200EE AM28F010A-200EEB AM28F010A-200EI AM28F010A-200EIB AM28F010A-200FC AM28F010A-200FCB AM28F010A-200FE AM28F010A-200FEB AM28F010A-200FI AM28F010A-200FIB AM28F010A-200JC AM28F010A-200JCB AM28F010A-200JE AM28F010A-200JEB AM28F010A-200JI AM28F010A-200JIB AM28F010A-200PC AM28F010A-200PCB AM28F010A-200PE AM28F010A-200PEB AM28F010A-200PI AM28F010A-200PIB AM
OCR Text ...m write cycle, addresses are latched on the falling edge of WE# or CE#, whichever occurs last. Data is latched on the rising edge of WE# or CE#, whichever occurs first. To simplify the following discussion, the WE# pin is used as the wri...
Description 1 Megabit (128 K x 8-Bit) CMOS 12.0 Volt/ Bulk Erase Flash Memory with Embedded Algorithms
1 Megabit (128 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory with Embedded Algorithms

File Size 235.82K  /  35 Page

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    AM28F010 AM27F010-120EC AM27F010-120ECB AM27F010-120EE AM27F010-120EEB AM27F010-120EI AM27F010-120EIB AM27F010-120FC AM2

AMD[Advanced Micro Devices]
Part No. AM28F010 AM27F010-120EC AM27F010-120ECB AM27F010-120EE AM27F010-120EEB AM27F010-120EI AM27F010-120EIB AM27F010-120FC AM27F010-120FCB AM27F010-120FE AM27F010-120FEB AM27F010-120FI AM27F010-120FIB AM27F010-120JC AM27F010-120JCB AM27F010-120JE AM27F010-120JEB AM27F010-120JI AM27F010-120JIB AM27F010-120PC AM27F010-120PCB AM27F010-120PE AM27F010-120PEB AM27F010-120PI AM27F010-120PIB AM27F010-150EC AM27F010-150ECB AM27F010-150EE AM27F010-150EEB AM27F010-150EI AM27F010-150EIB AM27F010-150FC AM27F010-150FCB AM27F010-150FE AM27F010-150FEB AM27F010-150FI AM27F010-150FIB AM27F010-150JC AM27F010-150JCB AM27F010-150JE AM27F010-150JEB AM27F010-150JI AM27F010-150JIB AM27F010-150PC AM27F010-150PCB AM27F010-150PE AM27F010-150PEB AM27F010-150PI AM27F010-150PIB AM28F010-120EC AM28F010-120ECB AM28F010-120EI AM28F010-120FI AM28F010-120JC AM28F010-120JE AM28F010-120JIB AM28F010-120PI AM28F010-150EC AM28F010-150ECB AM28F010-150EE AM28F010-150EEB AM28F010-150EI AM28F010-150PEB AM28F010-200PIB AM28F010-120PE AM28F010-120PIB AM28F010-90EI AM28F010-120PC AM28F010-200EEB AM28F010-200JI AM28F010-200PC AM28F010-200PCB AM28F010-200PE AM28F010-200PEB AM28F010-200PI AM28F010-90EC AM28F010-90ECB AM28F010-90EE AM28F
OCR Text ...stem write cycle, addresses are latched on the falling edge of WE# or CE# whichever occurs last. Data is latched on the ris- ing edge of WE# or CE# whichever occurs first. To simplify the following discussion, the WE# pin is used as the ...
Description 1 Megabit (128 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory

File Size 258.46K  /  35 Page

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    AM28F256 AM28F256-120EC AM28F256-120ECB AM28F256-120EE AM28F256-120EEB AM28F256-120EI AM28F256-120EIB AM28F256-120FC AM2

AMD[Advanced Micro Devices]
Part No. AM28F256 AM28F256-120EC AM28F256-120ECB AM28F256-120EE AM28F256-120EEB AM28F256-120EI AM28F256-120EIB AM28F256-120FC AM28F256-120FCB AM28F256-120FE AM28F256-120FEB AM28F256-120FI AM28F256-120FIB AM28F256-120JC AM28F256-120JCB AM28F256-120JE AM28F256-120JEB AM28F256-120JI AM28F256-120JIB AM28F256-120PC AM28F256-120PCB AM28F256-120PE AM28F256-120PI AM28F256-120PIB AM28F256-150EC AM28F256-150ECB AM28F256-150EE AM28F256-150EEB AM28F256-150EI AM28F256-150EIB AM28F256-150FC AM28F256-150FCB AM28F256-150FE AM28F256-150FEB AM28F256-150FI AM28F256-150FIB AM28F256-150JC AM28F256-150JCB AM28F256-150JE AM28F256-150JEB AM28F256-150JI AM28F256-150JIB AM28F256-150PC AM28F256-150PCB AM28F256-150PE AM28F256-150PEB AM28F256-150PI AM28F256-150PIB AM28F256-200EC AM28F256-200ECB AM28F256-200EE AM28F256-200EEB AM28F256-200EI AM28F256-200EIB AM28F256-200FC AM28F256-200FCB AM28F256-200FE AM28F256-200FEB AM28F256-200FI AM28F256-200FIB AM28F256-200JC AM28F256-200JCB AM28F256-200JE AM28F256-200JEB AM28F256-200JI AM28F256-200JIB AM28F256-200PC AM28F256-200PCB AM28F256-200PE AM28F256-200PEB AM28F256-200PI AM28F256-200PIB AM28F256-70EC AM28F256-70ECB AM28F256-70EE AM28F256-70EEB AM28F256-70EI AM28F256-70EIB AM28
OCR Text ...stem write cycle, addresses are latched on the falling edge of WE# or CE# whichever occurs last. Data is latched on the rising edge of WE# or CE# whichever occurs first. To simplify the fol- lowing discussion, the WE# pin is used as the ...
Description 256 Kilobit (32 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory

File Size 258.84K  /  35 Page

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    HYMD564646AXX

Hynix Semiconductor
Part No. HYMD564646AXX
OCR Text ...ddresses and control inputs are latched on the rising edges of the clock, data, data st robes and write data masks inputs are sampled on both ris- ing and falling edges of it. the data paths are internally pipelined and 2-bit prefetched to ...
Description Unbuffered DDR SDRAM DIMM

File Size 258.99K  /  16 Page

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    CY7C923502 CY7C9235-270JC CY7C9235-400JC

http://
Cypress Semiconductor
Part No. CY7C923502 CY7C9235-270JC CY7C9235-400JC
OCR Text ... present on the PD0-9 inputs is latched, and routed to the Q0-9 outputs. This pin is only interpreted when DVB_EN is active (LOW). If the CY7C9235 is only used in SMPTE-259M mode this signal should be tied to VSS. Enable Next Parallel Data....
Description SMPTE-259M/DVB-ASI Scrambler/Controller

File Size 108.15K  /  8 Page

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    SST26VF016 SST26VF032 SST26VF01613

Silicon Storage Technology, Inc
Silicon Storage Technol...
Part No. SST26VF016 SST26VF032 SST26VF01613
OCR Text ...s, addresses, or input data are latched on the rising edge of the clock input, while output data is shifted out on the falling edge of the clock input. sio[3:0] serial data input/output to transfer commands, addresses, or data serially into...
Description Serial Quad I/O SQI Flash Memory

File Size 382.65K  /  39 Page

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    CY7C9235A CY7C9235A-270JC

http://
Cypress Semiconductor
Part No. CY7C9235A CY7C9235A-270JC
OCR Text ... present on the PD0-9 inputs is latched, and routed to the Q0-9 outputs. This pin is only interpreted when DVB_EN is active (LOW). If the CY7C9235A is only used in SMPTE-259M mode this signal should be tied to VSS. Enable Next Parallel Data...
Description SMPTE-259M/DVB-ASI Scrambler/Controller

File Size 90.64K  /  8 Page

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    CY7C933502 CY7C9335-270AC

Cypress Semiconductor
Part No. CY7C933502 CY7C9335-270AC
OCR Text ... (and DVB_EN is HIGH), the data latched into the input register is routed around both the NRZI decoder and the SMPTE descrambler and presented to the output register. If BYPASS is LOW at the rising edge of the CKR clock (and DVB_EN is HIGH)...
Description SMPTE-259M/DVB-ASI Descrambler/Framer-Controller

File Size 128.06K  /  8 Page

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    CY7C9335A CY7C9335A-270AC

Cypress Semiconductor, Corp.
Cypress Semiconductor Corp.
Part No. CY7C9335A CY7C9335A-270AC
OCR Text ... (and DVB_EN is HIGH), the data latched into the input register is routed around both the NRZI decoder and the SMPTE descrambler and presented to the output register. If BYPASS is LOW at the rising edge of the CKR clock (and DVB_EN is HIGH)...
Description Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 SPECIALTY TELECOM CIRCUIT, PQFP100
SMPTE-259M/DVB-ASI Descrambler/Framer-Controller(SMPTE-259M/DVB-ASI 译码帧控制器)

File Size 82.57K  /  8 Page

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