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PHILIPS[Philips Semiconductors]
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| Part No. |
NE5539 SE5539F SE5539N NE5539D NE5539F NE5539N SE5539
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| OCR Text |
...nd phase response to a standard five-step modulated staircase linearity signal (Figures 8, 9 and 10). As can be seen in Figure 9, the gain varies less than 0.5% from the bottom to the top of the staircase. The maximum differential phase sho... |
| Description |
High frequency operational amplifier
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| File Size |
161.93K /
14 Page |
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INTERSIL[Intersil Corporation]
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| Part No. |
HSP50016JC HSP5001600 HSP50016JC-75 HSP50016 HSP50016JC-52
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| OCR Text |
...l Word Value (in Hex) There are five parameters which control the Phase Generator: Phase offset, minimum phase increment, maximum phase incr...sided bandwidths are specified by Equations 10 and 11.
- 3dB BW DS = 0.1375F S R 16 < R < 16384 (E... |
| Description |
Digital Down Converter, 75MSPS, 16-Bit input, Low Pass I/Q Filters
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| File Size |
255.74K /
30 Page |
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it Online |
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Sanyo
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| Part No. |
LB8632V
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| OCR Text |
...trol for four motors using only five CPU port lines. This requires two external transistors and two ICs. The LB8632V also provides non-opera...sided drive mode, i.e. when a single output from the OUT1, OUT2, OUT3P and OUT3N pins is used. 9. St... |
| Description |
Monolithic Digital IC
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| File Size |
368.15K /
18 Page |
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Philips
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| Part No. |
PCF8832
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| OCR Text |
...tside world and PCF8832. One of five industrial standard interfaces can be selected using the interface configuration inputs PS2, PS1 and PS0. 7.2 Configuration control
The display is generated by continuously reading-out rows of RAM dat... |
| Description |
STN RGB - 384 output column
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| File Size |
375.35K /
76 Page |
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it Online |
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SIEMENS[Siemens Semiconductor Group]
Infineon
SIEMENS AG
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| Part No. |
HYM72V8010GS-60 HYM72V8010GS-50 HYM72V8000GS-60 HYM72V8000GS-50 Q67100-Q2085 Q67100-Q2086 HYM72V8000GS-50-
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| OCR Text |
...ngle-in-line package comprising five HYB 3165800J/T 8M x 8 DRAMs in 500 mil wide SOJ or TSOPII - packages mounted together with nine 0.2 F ceramic decoupling capacitors on a PC board. All inputs except RAS and DQ are buffered by using four ... |
| Description |
8M x 72 Bit ECC FPM DRAM Module buffered
8M x 72-Bit Dynamic RAM Module (ECC - Module)
8M x 72-Bit Dynamic RAM Module 8米72位动态随机存储器模块
8M x 72-Bit Dynamic RAM Module 8M X 72 FAST PAGE DRAM MODULE, 60 ns, DMA168
Connector; Leaded Process Compatible:Yes; Peak Reflow Compatible (260 C):Yes 8M X 72 FAST PAGE DRAM MODULE, 50 ns, DMA168
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| File Size |
84.49K /
11 Page |
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ALLEGRO[Allegro MicroSystems]
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| Part No. |
A8904SLB A8904 A8904SLB-T A8904SLP-T A8904SLP
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| OCR Text |
...ing A8902-A application, as the five most significant bits are reset to zero, which is the default condition for A8902-A operation. The only consideration when using the A8904 in an A8902-A application, is to ensure the minimum CHIP SELECT ... |
| Description |
3-PHASE BRUSHLESS DC MOTOR CONTROLLER/DRIVER WITH BACK-EMF SENSING
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| File Size |
825.96K /
18 Page |
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it Online |
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Price and Availability
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