|
|
|
Leadtrend
|
Part No. |
LD7575
|
OCR Text |
...s:
IPEAK(MAX) = 0.85 V RS
A 350ns leading-edge blanking (LEB) time is included in the input of CS pin to prevent the false-trigger caused by the current spike. In the low power application, if the total pulse width of the turn-on spikes... |
Description |
Green-Mode PWM Controller
|
File Size |
386.43K /
18 Page |
View
it Online |
Download Datasheet |
|
|
|
Leadtrend
|
Part No. |
LD7552B
|
OCR Text |
...mp GND CS
Rs
Fig. 15
A 350ns leading-edge blanking (LEB) time is included in the input of CS pin to prevent the false-trigger from the current spike. In the low power application, if the total pulse width of the turn-on spikes is l... |
Description |
Green Mode PWM Controller
|
File Size |
339.97K /
16 Page |
View
it Online |
Download Datasheet |
|
|
|
NTE[NTE Electronics]
|
Part No. |
NTE2102
|
OCR Text |
350ns
Description: The NTE2101 is a high-speed 1024 x 1 bit static random access read/write memory in a 16-Lead DIP type package designed using N-Channel depletion mode silicon gate technology. Static storage cells eliminate the need for c... |
Description |
Integrated Circuit NMOS, 1K Static RAM (SRAM), 350ns Integrated Circuit NMOS / 1K Static RAM (SRAM) / 350ns
|
File Size |
27.95K /
3 Page |
View
it Online |
Download Datasheet |
|
|
|
INTERSIL[Intersil Corporation]
|
Part No. |
HD-4883 HD-4702 FN2955
|
OCR Text |
...r ECP goes Low must be at least 350ns long to guarantee reset of all Counters. 9. It is recommended that input rise and fall times to the clock inputs (CP , IX) be less than 15ns. SYMBOL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL tTLH tTHL tS ... |
Description |
CMOS Programmable Bit Rate Generator From old datasheet system
|
File Size |
80.01K /
8 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|