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Atmel corp
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| Part No. |
AT75C1010NBSP
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| OCR Text |
...x. The exchanged information is formatted in structured messages. The message format and semantics are described in sections "Request Notification Messages" on page 9 and "Status Notification Messages" on page 14. The ARM has the ability to... |
| Description |
The AT75C1010 is a software module designed to run on the OakDSPCore subsystem of the AT75 series SI
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| File Size |
161.06K /
29 Page |
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ATMEL[ATMEL Corporation]
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| Part No. |
AT90SP0801NBSP AT90SP0801 AT90SP0801-01SC
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| OCR Text |
...are sourced by the host and are formatted as follows:
01010000 s1s0000000 count data0 data1 ... dataN crc0 crc1
Count denotes the total number of bytes that follows the command, including any CRC bytes. A 0 value is illegal. 255 is the ... |
| Description |
This is a summary document. A complete document is available under NDA. For more information, please Secure Signature Generation Chip
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| File Size |
97.35K /
12 Page |
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IDT
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| Part No. |
IDT72V71660
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| OCR Text |
...s frame synchronization signals formatted according to ST-BUS(R) and GCI specifications. When pin WFPS is HIGH, this pin accepts a negative frame pulse, which conforms to the WFPS format. Ground Rail. This is the output enable control for t... |
| Description |
TSI-TDM Switches
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| File Size |
213.04K /
31 Page |
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IDT
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| Part No. |
IDT72V70210
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| OCR Text |
...s frame synchronization signals formatted according to ST-BUS(R) and GCI specifications. I This pin is the frame measurement input. I Serial clock for shifting data in/out on the serial streams (RX/TX 0-31). This input accepts a 4.096 MHz c... |
| Description |
TSI-TDM Switches
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| File Size |
110.43K /
19 Page |
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IDT[Integrated Device Technology]
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| Part No. |
IDT72V70800 IDT72V70800TF IDT72V70800PF
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| OCR Text |
...s frame synchronization signals formatted according to ST-BUS(R) and GCI specifications. When the WFPS pin is HIGH, this pin accepts a negative frame pulse which conforms to WFPS formats. When the WFPS pin is LOW, this pin is the frame meas... |
| Description |
512 x 512 Time Slot Interchange Digital Switch, 3.3V TSI-TDM Switches 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 512 x 512
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| File Size |
143.64K /
21 Page |
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Motorola
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| Part No. |
MC14LC5480_D MC145480 MC14LC5480
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| OCR Text |
...d or ``piecewise-linear'' curve formatted as sign bit, three chord bits, and four step bits. For a given chord, all sixteen of the steps have the same voltage weighting. As the voltage of the analog input increases, the four step bits incre... |
| Description |
5 V PCM CODEC FILTER ADVANCE INFO 96 R0.1 From old datasheet system
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| File Size |
411.77K /
24 Page |
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Zarlink
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| Part No. |
MT8952B
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| OCR Text |
...BUS format - This is the serial formatted data output from the transmitter in NRZ form. It is in ST-BUS format if the Protocol Controller is in Internal Timing Mode with the data in selected timeslots (0,2,3 and 4) and the C-channel informa... |
| Description |
ISO-CMOS ST-BUS? FAMILY From old datasheet system
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| File Size |
668.77K /
26 Page |
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it Online |
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