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				MAXIM - Dallas Semiconductor Dallas Semiconducotr DALLAS[Dallas Semiconductor]
Part No.	DS5001FP-16N DS5001FP-16 DS5001FP DS5001FP-12-44
OCR Text	...enable for memory access on the bytewide bus. It connects to the chip enable input of one SRAM. CE1 is lithium-backed. It remains in a logic high inactive state when VCC falls below VLI. Non-battery-backed version of chip enable 1. This can...
Description	128k Soft Microprocessor Chip
File Size	552.88K / 26 Page	View it Online	Download Datasheet

				Applied Micro Circuits Corporation
Part No.	S5933
OCR Text	...bus and the optional serial and bytewide non-volatile memory buses. Data movement between buses can take place through mailbox registers or the FIFO data channel, or a user can define and enable one or more of the four Pass-Thru data channe...
Description	32-Bit PCI MatchMaker
File Size	163.12K / 18 Page	View it Online	Download Datasheet

				INTERSIL[Intersil Corporation]
Part No.	X28C010RM-15 X28C010RMB-25 X28C010RI-20T1C7168 X28C010 X28C010D X28C010D-12 X28C010D-15 X28C010DI X28C010DI-12 X28C010DI-15 X28C010DI-15C7681 X28C010DM X28C010DM-12 X28C010DMB-12 X28C010DMB-12C7309 X28C010DMB-12C7729 X28C010DMB-15 X28C010DMB-15C7762 X28C010DMB-20 X28C010DMC7237 X28C010FI-12 X28C010FI-15 X28C010FI-15C1009 X28C010FI-20 X28C010FI-25 X28C010FM X28C010FM-12 X28C010FMB-15 X28C010FMB-15C7619 X28C010FMB-15C7808 X28C010K-25 X28C010KM-12 X28C010KM-25 X28C010KM-25C7237 X28C010KMB-15 X28C010NM-12 X28C010NM-15 X28C010NMB-12 X28C010NMB-15 X28C010NMB-15C7309 X28C010RI-12 X28C010RI-20 X28C010RI-20C7168 X28C010RI-20C7975 X28C010RI-20T1
OCR Text	... the JEDEC approved pin out for bytewide memories, compatible with industry standard EEPROMs. The X28C010 supports a 256-byte page write operation, effectively providing a 19s/byte write cycle and enabling the entire memory to be typically ...
Description	5 Volt, Byte Alterable EEPROM
File Size	610.08K / 23 Page	View it Online	Download Datasheet

				Vitesse Semiconductor Corporation
Part No.	VSC8113 VSC8113QB VSC8113QB1 VSC8113QB2
OCR Text	...The serial data is converted to bytewide parallel data and presented on RXOUT[7:0] pins. A divide-by-8 version of the high-speed clock (RXLSCKOUT) should be used to synchronize the byte-serial RXOUT[7:0] data with the receive portion of the...
Description	ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux with Integrated Clock Generation and Clock Recovery
File Size	272.90K / 28 Page	View it Online	Download Datasheet

				AGERE[Agere Systems]
Part No.	TTSV02622 TTSV02622V2-DB
OCR Text	...and MUX/deMUX between 77.76 MHz bytewide internal data buses and the 622 Mbits/s external serial links. Each 622 Mbits/s serial link uses a pseudo-SONET protocol. SONET A1/A2 framing is used on the link for locating the 8 kHz frame location...
Description	STS-24 Backplane Transceiver
File Size	641.04K / 64 Page	View it Online	Download Datasheet

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