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CYPRESS[Cypress Semiconductor]
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
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| Part No. |
CY7C1338F CY7C1338F-100AI CY7C1338 CY7C1338F-66BGI CY7C1338F-100AC CY7C1338F-100BGC CY7C1338F-100BGI CY7C1338F-117AC CY7C1338F-117AI CY7C1338F-117BGC CY7C1338F-117BGI CY7C1338F-133AC CY7C1338F-133AI CY7C1338F-133BGC CY7C1338F-133BGI CY7C1338F-66AC CY7C1338F-66AI CY7C1338F-66BGC CYPRESSSEMICONDUCTORCORP-CY7C1338F-66AI CY7C1338F-66AXC
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| OCR Text |
.../O pins. When LOW, the I/O pins behave as outputs. When deasserted HIGH, I/O pins are three-stated, and act as input data pins. OE is masked during the first clock of a read cycle when emerging from a deselected state. Page 3 of 17
BWA,B... |
| Description |
DIODE ZENER TRIPLE ISOLATED 200mW 36Vz 0.05mA-Izt 0.05 0.05uA-Ir 27.3 SOT-363 3K/REEL 128K X 32 CACHE SRAM, 11 ns, PBGA119
DIODE ZENER TRIPLE ISOLATED 200mW 39Vz 0.05mA-Izt 0.05 0.05uA-Ir 29.6 SOT-363 3K/REEL 128K X 32 CACHE SRAM, 11 ns, PBGA119
4-Mb (128K x 32) Flow-Through Sync SRAM 128K X 32 CACHE SRAM, 11 ns, PQFP100
DIODE ZENER TRIPLE ISOLATED 200mW 33Vz 0.05mA-Izt 0.05 0.05uA-Ir 25 SOT-363 3K/REEL 128K X 32 CACHE SRAM, 11 ns, PQFP100
4-Mb (128K x 32) Flow-Through Sync SRAM 128K X 32 CACHE SRAM, 7.5 ns, PQFP100
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| File Size |
401.99K /
17 Page |
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it Online |
Download Datasheet
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Cypress
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| Part No. |
CY7C1355V25 CY7C1357V25 7C1355V
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| OCR Text |
...OW, the I/O pins are allowed to behave as outputs. When deasserted HIGH, I/O pins are three-stated, and act as input data pins. OE is masked during the data portion of a write sequence , during the first clock when emerging from a deselecte... |
| Description |
256Kx36/512Kx18 Flow-Thru SRAM with NoBL Architecture
From old datasheet system
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| File Size |
334.51K /
26 Page |
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it Online |
Download Datasheet |
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CYPRESS SEMICONDUCTOR CORP
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| Part No. |
CY7C1297H-133AXC
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| OCR Text |
...o pins. when low, the i/o pins behave as outputs. when deasse rted high, i/o pins are tri-stated, and act as input data pins. oe is masked during the first clock of a read cycle when emerging from a deselected state. adv input- synchr... |
| Description |
1-Mbit (64K x 18) Flow-Through Sync SRAM; Architecture: Standard Sync, Flow-through; Density: 1 Mb; Organization: 64Kb x 18; Vcc (V): 3.1 to 3.6 V
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| File Size |
490.56K /
15 Page |
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it Online |
Download Datasheet |
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Price and Availability
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