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INTEGRATED DEVICE TECHNOLOGY INC
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Part No. |
72P51749L6BBG 72P51749L5BBG
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OCR Text |
... ? default configuration can be augmented via the queue address bus ? ? ? ? ? number of queues and individual queue sizes may be configured at master reset though serial programming ? ? ? ? ? 200 mhz high speed operation (5ns cycle time) ? ... |
Description |
32K X 36 OTHER FIFO, 3.7 ns, PBGA256 32K X 36 OTHER FIFO, 3.6 ns, PBGA256
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File Size |
737.88K /
86 Page |
View
it Online |
Download Datasheet |
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INTEGRATED DEVICE TECHNOLOGY INC
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Part No. |
IDT72P51549L5BB8 IDT72P51539L6BBG IDT72P51539L6BB8
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OCR Text |
... ? default configuration can be augmented via the queue address bus ? ? ? ? ? number of queues and individual queue sizes may be configured at master reset though serial programming ? ? ? ? ? 200 mhz high speed operation (5ns cycle time) ? ... |
Description |
32K X 36 OTHER FIFO, 3.6 ns, PBGA256 16K X 36 OTHER FIFO, 3.7 ns, PBGA256
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File Size |
817.22K /
87 Page |
View
it Online |
Download Datasheet |
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INTEGRATED DEVICE TECHNOLOGY INC
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Part No. |
IDT72P51759L6BB8 IDT72P51759L5BBG
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OCR Text |
... ? default configuration can be augmented via the queue address bus ? ? ? ? ? number of queues and individual queue sizes may be configured at master reset though serial programming ? ? ? ? ? 200 mhz high speed operation (5ns cycle time) ? ... |
Description |
64K X 36 OTHER FIFO, 3.7 ns, PBGA256 64K X 36 OTHER FIFO, 3.6 ns, PBGA256
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File Size |
778.08K /
86 Page |
View
it Online |
Download Datasheet |
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Price and Availability
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