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NXP Semiconductors N.V.
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| Part No. |
SC16C752IB48128
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| OCR Text |
... register. writing a logic 1 to mcr[0] will set the dtr output to logic 0 (low), enabling the modem. the output of these pins will be a logic 1 after writing a logic 0 to mcr[0], or after a reset. gnd 17 i signal and power ground. inta, int... |
| Description |
Dual UART with 64-byte FIFO, SOT313-2 (LQFP48), Reel Pack, SMD, 13", Turned 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP48
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| File Size |
205.14K /
47 Page |
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Download Datasheet
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NXP Semiconductors N.V.
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| Part No. |
SC16C751BIBS128 SC16C751BIBS
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| OCR Text |
...y clearing bit 1 ( r ts) of the mcr. in the auto- r ts mode, r ts is set to the inactive level by the receiver threshold control logic. rx 4 i serial data input. rx is serial data input from a connected communications device. tx 5 o serial... |
| Description |
5 V, 3.3 V and 2.5 V UART with 64-byte FIFOs; Package: SOT616-3 (HVQFN24); Container: Reel Pack, SMD, 13", Turned 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQCC32
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| File Size |
139.41K /
32 Page |
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it Online |
Download Datasheet |
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NXP Semiconductors N.V.
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| Part No. |
SC16C652BIBS151 SC16C652BIB48157 SC16C652BIB48151 SC16C652BIB48
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| OCR Text |
... register. writing a logic 1 to mcr[0] will set the dtr output to logic 0, enabling the modem. this pin will be a logic 1 after writing a logic 0 to mcr[0], or after a reset. this pin has no effect on the uarts transmit or receive operation... |
| Description |
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.) with 32-byte FIFOs and infrared (IrDA) encoder/decoder; Package: SOT313-2 (LQFP48); Container: Tray Pack, Bakeable, Single 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP48
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.) with 32-byte FIFOs and infrared (IrDA) encoder/decoder; Package: SOT313-2 (LQFP48); Container: Tray Pack, Bakeable, Multiple 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP48
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.) with 32-byte FIFOs and infrared (IrDA) encoder/decoder; Package: SOT617-1 (HVQFN32); Container: Tray Pack, Bakeable, Single 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQCC32
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| File Size |
193.61K /
43 Page |
View
it Online |
Download Datasheet |
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NXP Semiconductors N.V.
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| Part No. |
SC16C752BIBS128 SC16C752BIBS151 SC16C752BIBS157
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| OCR Text |
... register. writing a logic 1 to mcr[0] will set the dtr output to logic 0 (low), enabling the modem. the output of these pins will be a logic 1 after writing a logic 0 to mcr[0], or after a reset. dtrb 35 - o gnd 17 13 i signal and power gr... |
| Description |
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs; Package: SOT617-1 (HVQFN32); Container: Reel Pack, SMD, 13", Turned 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQCC32
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs; Package: SOT617-1 (HVQFN32); Container: Tray Pack, Bakeable, Single 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQCC32
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs; Package: SOT617-1 (HVQFN32); Container: Tray Pack, Bakeable, Multiple 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQCC32
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| File Size |
213.90K /
47 Page |
View
it Online |
Download Datasheet |
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Exar, Corp.
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| Part No. |
XR16M2751IM48-F
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| OCR Text |
...hrough the software setting of mcr[3]. inta is set to the active mode and op2a# output to a logic 0 when mcr[3] is set to a logic 1. inta is set to the three state mode and op2a# to a logic 1 when mcr[3] is set to a logic 0. see mcr[3].... |
| Description |
1 CHANNEL(S), 8M bps, SERIAL COMM CONTROLLER, PQFP48 7 X 7 MM, 1 MM HEIGHT, GREEN, TQFP-48
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| File Size |
485.15K /
55 Page |
View
it Online |
Download Datasheet |
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