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GSI Technology, Inc.
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| Part No. |
GS880E18 GS880E36T-11 GS880E18T-11 GS880E32T-11.5I GS880E18T-11.5T GS880E36T-11.5I GS880E18T-11.5I GS880E18T-66I GS880E36T-66I GS880E36T-11I GS880E36T-100 GS880E36T-100I GS880E18T-100 GS880E18T-11I GS880E18T-100I GS880E32T-80 GS880E32T-80I
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| OCR Text |
...ormance synchronous SRAM with a 2bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds application in synchronous SRAM applications, ranging ... |
| Description |
512K X 18 CACHE SRAM, 11.5 ns, PQFP100
512K x 18, 256K x 32, 256K x 36 8Mb Sync Burst SRAMs 256K X 32 CACHE SRAM, 11.5 ns, PQFP100
512K x 18, 256K x 32, 256K x 36 8Mb Sync Burst SRAMs 512K X 18 CACHE SRAM, 11 ns, PQFP100
512K x 18, 256K x 32, 256K x 36 8Mb Sync Burst SRAMs 256K X 36 CACHE SRAM, 11 ns, PQFP100
8Mb12K x 18Bit) Synchronous Burst SRAM(8M位（512K x 18位）同步静态RAM（带2位脉冲地址计数器）)
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| File Size |
853.88K /
25 Page |
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Samsung
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| Part No. |
K9G4G08B0A K9G4G08U0A K9L8G08U1A-I
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| OCR Text |
...ss : 30ns(Min.) * Memory Cell : 2bit / Memory Cell * Fast Write Cycle Time - Program time : 800s(Typ.) - Block Erase Time : 1.5ms(Typ.) * Command/Address/Data Multiplexed I/O Port * Hardware Data Protection - Program/Erase Lockout During Po... |
| Description |
Preliminary FLASH MEMORY
(K9G4G08U0A / K9G4G08B0A) Flash Memory
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| File Size |
920.59K /
44 Page |
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it Online |
Download Datasheet |
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Samsung
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| Part No. |
K9GAG08B0M K9LBG08U1M
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| OCR Text |
...ss : 25ns(Min.) * Memory Cell : 2bit / Memory Cell * Fast Write Cycle Time - Program time : 800s(Typ.) - Block Erase Time : 1.5ms(Typ.) * Command/Address/Data Multiplexed I/O Port * Hardware Data Protection - Program/Erase Lockout During Po... |
| Description |
FLASH MEMORY
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| File Size |
1,263.99K /
51 Page |
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it Online |
Download Datasheet |
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Princeton Technology Corporation
Princeton Technology, Corp.
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| Part No. |
PT9120-QF24 PT9120-QF28
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| OCR Text |
...ut saturation. The AGC range is 2bit output of the 2-bit A/D converter as the regulation variable and sets the gain of the 1st IF amplifier to achieve a logic HIGH duty cycle of 33% on the MAG bit output. The time constant of the AGC loop i... |
| Description |
GPS Receiver RF Front End IC GPS接收机射频前端IC
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| File Size |
567.37K /
18 Page |
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it Online |
Download Datasheet |
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Price and Availability
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