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NANYA TECHNOLOGY CORP
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| Part No. |
NT5DS128M4BT-6K
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| OCR Text |
...features ? ddr 512m bit, die b, based on 110nm design rules ? double data rate architecture: two data transfers per clock cycle ? bidirectional data strobe (dqs) is transmitted and received with data, to be used in capturing data at the ... |
| Description |
128M X 4 DDR DRAM, 0.7 ns, PDSO66
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| File Size |
2,500.58K /
80 Page |
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TOSHIBA
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| Part No. |
TB9060FNG
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| OCR Text |
... time is set for t/2 by timer 2 based on the t cycle of timer 1. period during which an inductive voltage is not detected is set for 3t/4 by timer 3 based on the t cycle of timer 1 t
tb9060fng 2005-01-17 7 reference voltage ... |
| Description |
Pre-driver for automobile
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| File Size |
255.89K /
20 Page |
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PHILIPS[Philips Semiconductors]
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| Part No. |
PR31500ABC PR31500
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| OCR Text |
...4216 codec * synchronous, frame-based protocol * PR31500 always master source of clock and frame frequency and
phase; programmable clock frequency
* bit-mapped graphics * supports monochrome, grey scale, or color modes * time-based dith... |
| Description |
Poseidon embedded processor
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| File Size |
125.53K /
24 Page |
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it Online |
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| Part No. |
M392B5270DH0-CK0 M392B5773DH0-CF8
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| OCR Text |
...m0 240pin vlp registered dimm based on 2gb d-die 78fbga with lead-free & halogen-free (rohs compliant)
- 2 - datasheet ddr3 sdram rev. 1.21 vlp registered dimm revision history revision no. history draft date remark editor 1.0 - first s... |
| Description |
512M X 72 DDR DRAM MODULE, 20 ns, DMA240
256M X 72 DDR DRAM MODULE, 20 ns, DMA240
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| File Size |
805.37K /
51 Page |
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BOARDCOM[Broadcom Corporation.]
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| Part No. |
PROPANE
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| OCR Text |
...echnology for DOCSIS/EuroDOCSIS-based cable systems
TM
* Cable systems using end-to-end Broadcom * PROPANE's increased capacity enables:
* Triples the upstream capacity and is fully compatible
with DOCSIS/EuroDOCSIS-based systems
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| Description |
DOCSIS/EURODOCSIS ACCELERATOR SOFTWARE
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| File Size |
219.49K /
2 Page |
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it Online |
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Price and Availability
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