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For -50ps Found Datasheets File :: 513 Search Time::1.016ms
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				Intersil, Corp. Intersil Corporation
Part No.	ISL14011 ISL14011IRZ ISL14011IRZ-T
OCR Text	...ock for Inputs * Period Jitter ~50ps RMS * Single Supply; 3.3V nominal * Extended Temperature Range: -40C to +85C * Available in small foot print package - 16 Ld QFN 3mmx3mm * Pb-Free plus anneal available (RoHS Compliant) Ordering Infor...
Description	Low Jitter Clock Generators for Set-Top Box 30 MHz, OTHER CLOCK GENERATOR, QCC16 Low Jitter Clock Generators for Set-Top Box; Temperature Range: -40°C to 85°C; Package: 16-QFN T&R 30 MHz, OTHER CLOCK GENERATOR, QCC16
File Size	111.74K / 5 Page	View it Online	Download Datasheet

				Intersil, Corp. Intersil Corporation
Part No.	ISL14017IRZ ISL14010 ISL14010IRZ ISL14017 ISL14010IRZ-T
OCR Text	...ock for Inputs * Period Jitter ~50ps RMS * Single Supply; 3.3V nominal * Extended Temperature Range: -40C to +85C * Available in small foot print package - 16 Ld QFN 3mmx3mm * Pb-Free plus anneal available (RoHS Compliant) Ordering Infor...
Description	Low Jitter Clock Generators for Set-Top Box; Temperature Range: -40°C to 85°C; Package: 16-QFN T&R 54 MHz, OTHER CLOCK GENERATOR, PQCC16 Low Jitter Clock Generators for Set-Top Box 54 MHz, OTHER CLOCK GENERATOR, PQCC16
File Size	239.60K / 5 Page	View it Online	Download Datasheet

				MICREL[Micrel Semiconductor]
Part No.	SY89325V SY89325VMITR SY89325VMGTR
OCR Text	...oughput * >750MHz clock fMAX * <50ps within-device skew Ultra-low jitter design: * <1psRMS random jitter * <10psPP deterministic jitter * <1psRMS cycle-to-cycle jitter * <10psPP total jitter (clock) Accepts CML, PECL, LVPECL inputs 35...
Description	3.3V/5V 1.5Gbps DIFFERENTIAL CML/PECL/LVPECL-to-LVDS TRANSLATOR
File Size	504.11K / 7 Page	View it Online	Download Datasheet

				MOTOROLA[Motorola Inc]
Part No.	MC100EL15D MC10EL15D
OCR Text	...GE CASE 751B-05 * * * * * 50ps Output-to-Output Skew Synchronous Enable/Disable Multiplexed Clock Input 75k Internal Input Pulldown Resistors >1000V ESD Protection PIN DESCRIPTION PIN CLK SCLK EN SEL VBB Q0-3 FUNCTION Diff Clock Input...
Description	1:4 Clock Distribution Chip
File Size	72.61K / 4 Page	View it Online	Download Datasheet

				ONSEMI[ON Semiconductor]
Part No.	MC100EL15 ON0664 MC10EL15
OCR Text	...GE CASE 751B-05 * * * * * 50ps Output-to-Output Skew Synchronous Enable/Disable Multiplexed Clock Input 75k Internal Input Pulldown Resistors >1000V ESD Protection PIN DESCRIPTION PIN CLK SCLK EN SEL VBB Q0-3 FUNCTION Diff Clock Input...
Description	From old datasheet system 1:4 Clock Distribution Chip
File Size	88.56K / 4 Page	View it Online	Download Datasheet

				Motorola, Inc
Part No.	MC100EP223 MC100EP223TC
OCR Text	...ts. * 200ps Part-to-Part Skew * 50ps Output-to-Output Skew * Differential Design * Open Emitter HSTL Compatible Outputs * 3.3V VCC * Both PECL and HSTL Inputs * 75k Input Pulldown Resistors * Thermally Enhanced 64 lead Exposed Pad LQFP The ...
Description	Low-Voltage 1:22 Differential PECL/HSTL Clock Driver
File Size	81.77K / 8 Page	View it Online	Download Datasheet

				MICREL[Micrel Semiconductor]
Part No.	SY58052UMG SY58052UMGTR SY58052UMI SY58052UMITR SY58052U
OCR Text	...tput Swing (50mV/div.) TIME (50ps/div.) 10.7Gbps Output PRBS 223-1 Output Swing (50mV/div.) TIME (20ps/div.) Output Swing (50mV/div.) TIME (20ps/div.) Output Amplitude vs. Data Rate 420 400 380 360 340 320 300 280 260 240 ...
Description	ULTRA-PRECISION CML DATA AND CLOCK SYNCHRONIZER W/ INTERNAL INPUT AND OUTPUT TERMINATION
File Size	190.79K / 8 Page	View it Online	Download Datasheet

				MICREL[Micrel Semiconductor]
Part No.	SY89200UMG SY89200UMGTR SY89200UMI SY89200UMITR SY89200U
OCR Text	...elay - <150ps rise/fall time - <50ps bank-to-bank phase offset * Ultra-low jitter design: - <1psRMS random jitter - <10psPP total jitter (clock) * Patent-pending input termination and VT pin accepts DC- and AC-coupled inputs (CML, PECL, LVD...
Description	Ultra-Precision 1:8 LVDS Fanout Buffer with Three ÷1/÷2/÷4 Clock Divider Output Banks Ultra-Precision 1:8 LVDS Fanout Buffer with Three ±1/±2/±4 Clock Divider Output Banks
File Size	542.56K / 11 Page	View it Online	Download Datasheet

				MICREL[Micrel Semiconductor]
Part No.	SY89208V SY89208VMITR
OCR Text	...tput Swing (60mV/div.) TIME (50ps/div.) 2.7Gbps, 223 - 1PRBS Precision Edge is a trademark of Micrel, Inc. MicroLeadFrame and MLF are trademarks of Amkor Technology, Inc. Rev.: A Amendment: /0 1 Issue Date: June 2003 Micr...
Description	From old datasheet system 3.3V/5V 3GHz PECL/ECL 2:1 MULTIPLEXER
File Size	241.67K / 7 Page	View it Online	Download Datasheet

				LATTICE[Lattice Semiconductor]
Part No.	ISPPAC-CLK5610V-01T100I ISPPAC-CLK5610V-01T48C ISPPAC-CLK5610V-01T48I ISPPAC-CLK5610V-01TN100C ISPPAC-CLK5610V-01TN48I ISPPAC-CLK5620V-01T100C ISPPAC-CLK5620V-01T100I ISPPAC-CLK5620V-01T48I ISPPAC-CLK5620V-01TN100C ISPPAC-CLK5620V-01TN100I ISPPAC-CLK5620V-01TN48C ISPPAC-CLK5620V-01TN48I ISPCLOCK5600 ISPPAC-CLK5610V-01T100C ISPPAC-CLK5610V-01TN100I ISPPAC-CLK5610V-01TN48C
OCR Text	...ion Low Output to Output Skew (<50ps) Low Jitter Peak-to-Peak (<60ps) Up to 20 Programmable Fan-out Buffers * Programmable output standards and individual enable controls - LVTTL, LVCMOS, HSTL, SSTL, LVDS, LVPECL * Programmable output impe...
Description	In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer
File Size	814.68K / 47 Page	View it Online	Download Datasheet

For -50ps Found Datasheets File :: 513 Search Time::1.016ms
Page :: | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | <14> | 15 |