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XILINX
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| Part No. |
XC2C256
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| OCR Text |
...eature. DataGATE is a method to selectively disable inputs of the CPLD that are not of interest during certain points in time.
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(c) 2002 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patent... |
| Description |
The CoolRunner™-II 256-macrocell device
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| File Size |
151.36K /
25 Page |
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it Online |
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Motorola
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| Part No. |
MC68SC302
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| OCR Text |
... the PC to the MC68SC302 can be selectively memory or I/O mapped. Only one clock source (crystal or oscillator) is needed for a simple terminal adaptor.
4
MC68SC302 PRODUCT INFORMATION
IM
SCC3
IDL/GCI PINS
IN
MOTOROLA
* ... |
| Description |
APPLICATION DEVELOPMENT SYSTEM
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| File Size |
43.00K /
8 Page |
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it Online |
Download Datasheet |
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XILINX
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| Part No. |
XC2C384
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| OCR Text |
...eature. DataGATE is a method to selectively disable inputs of the CPLD that are not of interest during certain points in time.
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Refer to the CoolRunnerTM-II family data sheet for architecture description.
(c) 2003 Xilinx... |
| Description |
The CoolRunner-II 384-macrocell device
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| File Size |
146.75K /
24 Page |
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it Online |
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Linear
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| Part No. |
LTC1437 LTC1436-PLL LTC1436 14367F
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| OCR Text |
...e Adaptive PowerTM output stage selectively drives two N-channel MOSFETs at frequencies up to 400kHz while reducing switching losses to maintain high efficiencies at low output currents. An auxiliary 0.5A linear regulator using an external ... |
| Description |
High Efficiency Low Noise Synchronous Step-Down Switching Regulators
From old datasheet system
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| File Size |
537.36K /
28 Page |
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it Online |
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STMicro
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| Part No. |
M27C1001
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| OCR Text |
...1' state. Data is introduced by selectively programming '0's into the desired bit locations. Although only '0's will be programmed,both '1's and '0's can be present in the data word. The only way to
changea '0' to a '1' is by die exposit... |
| Description |
1 Mbit (128Kb x8) UV EPROM and OTP EPROM
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| File Size |
110.77K /
16 Page |
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it Online |
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Price and Availability
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